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Rev 3147 Rev 3274
Line 46... Line 46...
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	addiu	$v0,$a1,3
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	addiu	$v0,$a1,3
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	li	$v1,-4			# 0xfffffffffffffffc
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	li	$v1,-4			# 0xfffffffffffffffc
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	and	$v0,$v0,$v1
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	and	$v0,$v0,$v1
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	beq	$a1,$v0,3f
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	beq	$a1,$v0,3f
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	move	$t0,$a0
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	move	$t0,$a0
- 
 
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	move	$t2,$a0			# save dst
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0:
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0:
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	beq	$a2,$zero,2f
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	beq	$a2,$zero,2f
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	move	$a3,$zero
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	move	$a3,$zero
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Line 61... Line 62...
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	bne	$a3,$a2,1b
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	bne	$a3,$a2,1b
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	sb	$a0,0($v1)
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	sb	$a0,0($v1)
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2:
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2:
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	jr	$ra
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	jr	$ra
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	move	$v0,$a1
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	move	$v0,$t2
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3:
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3:
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	addiu	$v0,$a0,3
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	addiu	$v0,$a0,3
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	and	$v0,$v0,$v1
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	and	$v0,$v0,$v1
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	bne	$a0,$v0,0b
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	bne	$a0,$v0,0b
Line 101... Line 102...
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	addiu	$a3,$a3,1
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	addiu	$a3,$a3,1
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	bne	$a3,$a2,6b
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	bne	$a3,$a2,6b
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	sb	$a0,0($v1)
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	sb	$a0,0($v1)
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	jr	$ra
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	jr	$ra
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	move	$v0,$a1
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	move	$v0,$t2
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jump_to_kernel:
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jump_to_kernel:
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	#
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	#
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	# TODO
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	# TODO
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	# Make sure that the I-cache, D-cache and memory are mutually coherent
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	# Make sure that the I-cache, D-cache and memory are mutually coherent