Rev 42 | Rev 78 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 42 | Rev 51 | ||
---|---|---|---|
Line 152... | Line 152... | ||
152 | the ia64-specific part of {\tt glibc}. |
152 | the ia64-specific part of {\tt glibc}. |
153 | 153 | ||
154 | Formerly, the project could be compiled with almost any version of {\tt binutils} starting with 2.15 |
154 | Formerly, the project could be compiled with almost any version of {\tt binutils} starting with 2.15 |
155 | and {\tt gcc} starting with 2.95, but especially after we added partial thread local storage |
155 | and {\tt gcc} starting with 2.95, but especially after we added partial thread local storage |
156 | support into our userspace layer, some architectures (e.g. mips32) will not compile even with {\tt gcc} 4.0.1 |
156 | support into our userspace layer, some architectures (e.g. mips32) will not compile even with {\tt gcc} 4.0.1 |
157 | and demand {\tt gcc} 4.1.0. Curiously, ia64 will not link when compiled with {\tt gcc} 4.1.0. |
157 | and demand {\tt gcc} 4.1.0 or newer. |
158 | 158 | ||
159 | As for the mips32 cross-compiler, {\OP} discovered a bug in {\tt gcc} (ticket \#23824) which caused {\tt gcc} to |
159 | As for the mips32 cross-compiler, {\OP} discovered a bug in {\tt gcc} (ticket \#23824) which caused {\tt gcc} to |
160 | incorrectly generate unaligned data access instructions (i.e. {\tt lwl}, {\tt lwr}, {\tt swl} and {\tt swr}). |
160 | incorrectly generate unaligned data access instructions (i.e. {\tt lwl}, {\tt lwr}, {\tt swl} and {\tt swr}). |
161 | 161 | ||
162 | As for the mips32 cross-binutils\footnote{It remains uninvestigated whether this problem also shows with other cross-tools.}, |
162 | As for the mips32 cross-binutils\footnote{It remains uninvestigated whether this problem also shows with other cross-tools.}, |