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| 6 | @ "ia64" Intel IA-64 |
6 | @ "ia64" Intel IA-64 |
| 7 | @ "mips32" MIPS 32-bit |
7 | @ "mips32" MIPS 32-bit |
| 8 | @ "ppc32" PowerPC 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
| 9 | @ "ppc64" PowerPC 64-bit |
9 | @ "ppc64" PowerPC 64-bit |
| 10 | @ "sparc64" Sun UltraSPARC |
10 | @ "sparc64" Sun UltraSPARC |
| - | 11 | @ "xen32" Xen 32-bit |
|
| 11 | ! ARCH (choice) |
12 | ! ARCH (choice) |
| 12 | 13 | ||
| 13 | # IA32 Compiler |
14 | # IA32 Compiler |
| 14 | @ "cross" Cross-compiler |
15 | @ "cross" Cross-compiler |
| 15 | @ "native" Native |
16 | @ "native" Native |
| Line 33... | Line 34... | ||
| 33 | @ "pentium4" Pentium 4 |
34 | @ "pentium4" Pentium 4 |
| 34 | @ "pentium3" Pentium 3 |
35 | @ "pentium3" Pentium 3 |
| 35 | @ "athlon-xp" Athlon XP |
36 | @ "athlon-xp" Athlon XP |
| 36 | @ "athlon-mp" Athlon MP |
37 | @ "athlon-mp" Athlon MP |
| 37 | @ "prescott" Prescott |
38 | @ "prescott" Prescott |
| 38 | ! [ARCH=ia32] IA32_CPU (choice) |
39 | ! [ARCH=ia32|ARCH=xen32] IA32_CPU (choice) |
| 39 | 40 | ||
| 40 | # MIPS Machine type |
41 | # MIPS Machine type |
| 41 | @ "msim" MSIM Simulator |
42 | @ "msim" MSIM Simulator |
| 42 | @ "simics" Virtutech Simics simulator |
43 | @ "simics" Virtutech Simics simulator |
| 43 | @ "lgxemul" GXEmul Little Endian |
44 | @ "lgxemul" GXEmul Little Endian |
| 44 | @ "bgxemul" GXEmul Big Endian |
45 | @ "bgxemul" GXEmul Big Endian |
| 45 | @ "indy" SGI Indy |
46 | @ "indy" SGI Indy |
| 46 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
47 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
| 47 | 48 | ||
| 48 | # Framebuffer support |
49 | # Framebuffer support |
| 49 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n) |
50 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=xen32)] CONFIG_FB (y/n) |
| 50 | 51 | ||
| 51 | # Framebuffer width |
52 | # Framebuffer width |
| 52 | @ "320" |
53 | @ "320" |
| 53 | @ "640" |
54 | @ "640" |
| 54 | @ "800" |
55 | @ "800" |
| Line 57... | Line 58... | ||
| 57 | @ "1280" |
58 | @ "1280" |
| 58 | @ "1400" |
59 | @ "1400" |
| 59 | @ "1440" |
60 | @ "1440" |
| 60 | @ "1600" |
61 | @ "1600" |
| 61 | @ "2048" |
62 | @ "2048" |
| 62 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
63 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
| 63 | 64 | ||
| 64 | # Framebuffer height |
65 | # Framebuffer height |
| 65 | @ "200" |
66 | @ "200" |
| 66 | @ "240" |
67 | @ "240" |
| 67 | @ "400" |
68 | @ "400" |
| Line 73... | Line 74... | ||
| 73 | @ "960" |
74 | @ "960" |
| 74 | @ "1024" |
75 | @ "1024" |
| 75 | @ "1050" |
76 | @ "1050" |
| 76 | @ "1200" |
77 | @ "1200" |
| 77 | @ "1536" |
78 | @ "1536" |
| 78 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
79 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice) |
| 79 | 80 | ||
| 80 | # Framebuffer depth |
81 | # Framebuffer depth |
| 81 | @ "8" |
82 | @ "8" |
| 82 | @ "16" |
83 | @ "16" |
| 83 | @ "24" |
84 | @ "24" |
| 84 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
85 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
| 85 | 86 | ||
| 86 | 87 | ||
| 87 | 88 | ||
| 88 | # Support for SMP |
89 | # Support for SMP |
| 89 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
90 | ! [ARCH=ia32|ARCH=amd64|ARCH=xen32] CONFIG_SMP (y/n) |
| 90 | 91 | ||
| 91 | # Improved support for hyperthreading |
92 | # Improved support for hyperthreading |
| 92 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
93 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_HT (y/n) |
| 93 | 94 | ||
| 94 | # Simics BIOS AP boot fix |
95 | # Simics BIOS AP boot fix |
| 95 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
96 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
| 96 | 97 | ||
| 97 | # Lazy FPU context switching |
98 | # Lazy FPU context switching |
| 98 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
99 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=xen32] CONFIG_FPU_LAZY (y/n) |
| 99 | 100 | ||
| 100 | # Power off on halt |
101 | # Power off on halt |
| 101 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
102 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
| 102 | 103 | ||
| 103 | ## Debugging configuration directives |
104 | ## Debugging configuration directives |
| Line 107... | Line 108... | ||
| 107 | 108 | ||
| 108 | # Deadlock detection support for spinlocks |
109 | # Deadlock detection support for spinlocks |
| 109 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
110 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
| 110 | 111 | ||
| 111 | # Watchpoint on rewriting AS with zero |
112 | # Watchpoint on rewriting AS with zero |
| 112 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
113 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
| 113 | 114 | ||
| 114 | # Save all interrupt registers |
115 | # Save all interrupt registers |
| 115 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n) |
116 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_ALLREGS (y/n) |
| 116 | 117 | ||
| 117 | # Use VHPT |
118 | # Use VHPT |
| 118 | ! [ARCH=ia64] CONFIG_VHPT (y/n) |
119 | ! [ARCH=ia64] CONFIG_VHPT (y/n) |
| 119 | 120 | ||
| 120 | ## Run-time configuration directives |
121 | ## Run-time configuration directives |
| Line 128... | Line 129... | ||
| 128 | @ "synch/rwlock3" Read write test 3 |
129 | @ "synch/rwlock3" Read write test 3 |
| 129 | @ "synch/rwlock4" Read write test 4 |
130 | @ "synch/rwlock4" Read write test 4 |
| 130 | @ "synch/rwlock5" Read write test 5 |
131 | @ "synch/rwlock5" Read write test 5 |
| 131 | @ "synch/semaphore1" Semaphore test 1 |
132 | @ "synch/semaphore1" Semaphore test 1 |
| 132 | @ "synch/semaphore2" Sempahore test 2 |
133 | @ "synch/semaphore2" Sempahore test 2 |
| 133 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
134 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=xen32] "fpu/fpu1" Intel fpu test 1 |
| 134 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
135 | @ [ARCH=ia32|ARCH=amd64|ARCH=xen32] "fpu/sse1" Intel Sse test 1 |
| 135 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
136 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
| 136 | @ "print/print1" Printf test 1 |
137 | @ "print/print1" Printf test 1 |
| 137 | @ "thread/thread1" Thread test 1 |
138 | @ "thread/thread1" Thread test 1 |
| 138 | @ "mm/mapping1" Mapping test 1 |
139 | @ "mm/mapping1" Mapping test 1 |
| 139 | @ "mm/falloc1" Frame Allocation test 1 |
140 | @ "mm/falloc1" Frame Allocation test 1 |