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46 | .text |
46 | .text |
47 | 47 | ||
48 | #include <arch/trap/trap_table.h> |
48 | #include <arch/trap/trap_table.h> |
49 | #include <arch/trap/regwin.h> |
49 | #include <arch/trap/regwin.h> |
50 | #include <arch/trap/interrupt.h> |
50 | #include <arch/trap/interrupt.h> |
- | 51 | #include <arch/trap/exception.h> |
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- | 52 | #include <arch/stack.h> |
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51 | 53 | ||
52 | #define TABLE_SIZE TRAP_TABLE_SIZE |
54 | #define TABLE_SIZE TRAP_TABLE_SIZE |
53 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
55 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
54 | 56 | ||
55 | /* |
57 | /* |
Line 57... | Line 59... | ||
57 | */ |
59 | */ |
58 | .align TABLE_SIZE |
60 | .align TABLE_SIZE |
59 | .global trap_table |
61 | .global trap_table |
60 | trap_table: |
62 | trap_table: |
61 | 63 | ||
- | 64 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
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- | 65 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
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- | 66 | .global instruction_access_exception |
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- | 67 | instruction_access_exception: |
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- | 68 | SIMPLE_HANDLER do_instruction_access_exc |
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- | 69 | ||
62 | /* TT = 0x24, TL = 0, clean_window handler */ |
70 | /* TT = 0x24, TL = 0, clean_window handler */ |
63 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
71 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
64 | .global clean_window_handler |
72 | .global clean_window_handler |
65 | clean_window_handler: |
73 | clean_window_handler: |
66 | CLEAN_WINDOW_HANDLER |
74 | CLEAN_WINDOW_HANDLER |
67 | 75 | ||
- | 76 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
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- | 77 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
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- | 78 | .global mem_address_not_aligned |
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- | 79 | mem_address_not_aligned: |
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- | 80 | SIMPLE_HANDLER do_mem_address_not_aligned |
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- | 81 | ||
68 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
82 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
69 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
83 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
70 | .global interrupt_level_1_handler |
84 | .global interrupt_level_1_handler |
71 | interrupt_level_1_handler: |
85 | interrupt_level_1_handler: |
72 | INTERRUPT_LEVEL_N_HANDLER 1 |
86 | INTERRUPT_LEVEL_N_HANDLER 1 |
Line 175... | Line 189... | ||
175 | 189 | ||
176 | /* |
190 | /* |
177 | * Handlers for TL>0. |
191 | * Handlers for TL>0. |
178 | */ |
192 | */ |
179 | 193 | ||
- | 194 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
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- | 195 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
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- | 196 | .global instruction_access_exception_high |
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- | 197 | instruction_access_exception_high: |
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- | 198 | SIMPLE_HANDLER do_instruction_access_exc |
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- | 199 | ||
180 | /* TT = 0x24, TL > 0, clean_window handler */ |
200 | /* TT = 0x24, TL > 0, clean_window handler */ |
181 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
201 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
182 | .global clean_window_handler_high |
202 | .global clean_window_handler_high |
183 | clean_window_handler_high: |
203 | clean_window_handler_high: |
184 | CLEAN_WINDOW_HANDLER |
204 | CLEAN_WINDOW_HANDLER |
185 | 205 | ||
- | 206 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
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- | 207 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
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- | 208 | .global mem_address_not_aligned_high |
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- | 209 | mem_address_not_aligned_high: |
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- | 210 | SIMPLE_HANDLER do_mem_address_not_aligned |
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186 | 211 | ||
187 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
212 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
188 | - | ||
189 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
213 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
190 | .global spill_0_normal_high |
214 | .global spill_0_normal_high |
191 | spill_0_normal_high: |
215 | spill_0_normal_high: |
192 | SPILL_NORMAL_HANDLER |
216 | SPILL_NORMAL_HANDLER |
193 | 217 | ||
194 | - | ||
195 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
218 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
196 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
219 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
197 | .global fill_0_normal_high |
220 | .global fill_0_normal_high |
198 | fill_0_normal_high: |
221 | fill_0_normal_high: |
199 | FILL_NORMAL_HANDLER |
222 | FILL_NORMAL_HANDLER |
Line 207... | Line 230... | ||
207 | .global trap_table_save |
230 | .global trap_table_save |
208 | trap_table_save: |
231 | trap_table_save: |
209 | .space TABLE_SIZE, 0 |
232 | .space TABLE_SIZE, 0 |
210 | 233 | ||
211 | 234 | ||
- | 235 | /* Preemptible trap handler. |
|
- | 236 | * |
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- | 237 | * This trap handler makes arrangements to |
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- | 238 | * make calling scheduler() possible. |
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- | 239 | * |
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212 | /* Trap handler that explicitly saves global registers. |
240 | * The caller is responsible for doing save |
- | 241 | * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE |
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- | 242 | * bytes on stack. |
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213 | * |
243 | * |
214 | * Input registers: |
244 | * Input registers: |
215 | * %l0 Address of function to call. |
245 | * %l0 Address of function to call. |
216 | * Output registers: |
246 | * Output registers: |
217 | * %l1 - %l7 Copy of %g1 - %g7 |
247 | * %l1 - %l7 Copy of %g1 - %g7 |
218 | */ |
248 | */ |
219 | .global saving_handler |
249 | .global preemptible_handler |
220 | saving_handler: |
250 | preemptible_handler: |
- | 251 | /* |
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- | 252 | * Save TSTATE, TPC, TNPC and PSTATE aside. |
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- | 253 | */ |
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- | 254 | rdpr %tstate, %g1 |
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- | 255 | rdpr %tpc, %g2 |
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- | 256 | rdpr %tnpc, %g3 |
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- | 257 | rdpr %pstate, %g4 |
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- | 258 | ||
- | 259 | stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE] |
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- | 260 | stx %g2, [%fp + STACK_BIAS + SAVED_TPC] |
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- | 261 | stx %g3, [%fp + STACK_BIAS + SAVED_TNPC] |
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- | 262 | stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE] |
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- | 263 | ||
- | 264 | /* |
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- | 265 | * Write 0 to TL. |
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- | 266 | */ |
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- | 267 | wrpr %g0, 0, %tl |
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- | 268 | ||
- | 269 | /* |
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- | 270 | * Alter PSTATE. |
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- | 271 | * - switch to normal globals. |
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- | 272 | */ |
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- | 273 | and %g4, ~1, %g4 ! mask alternate globals |
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- | 274 | wrpr %g4, 0, %pstate |
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- | 275 | ||
- | 276 | /* |
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- | 277 | * Save the normal globals. |
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- | 278 | */ |
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221 | SAVE_GLOBALS |
279 | SAVE_GLOBALS |
- | 280 | ||
- | 281 | /* |
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- | 282 | * Call the higher-level handler. |
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- | 283 | */ |
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222 | call %l0 |
284 | call %l0 |
223 | nop |
285 | nop |
- | 286 | ||
- | 287 | /* |
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- | 288 | * Restore the normal global register set. |
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- | 289 | */ |
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224 | RESTORE_GLOBALS |
290 | RESTORE_GLOBALS |
- | 291 | ||
- | 292 | /* |
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- | 293 | * Restore PSTATE from saved copy. |
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- | 294 | * Alternate globals become active. |
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- | 295 | */ |
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- | 296 | ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4 |
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- | 297 | wrpr %l4, 0, %pstate |
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- | 298 | ||
- | 299 | /* |
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- | 300 | * Write 1 to TL. |
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- | 301 | */ |
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- | 302 | wrpr %g0, 1, %tl |
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- | 303 | ||
- | 304 | /* |
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- | 305 | * Read TSTATE, TPC and TNPC from saved copy. |
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- | 306 | */ |
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- | 307 | ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1 |
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- | 308 | ldx [%fp + STACK_BIAS + SAVED_TPC], %g2 |
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- | 309 | ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3 |
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- | 310 | ||
- | 311 | /* |
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225 | restore /* matches the save instruction from the top-level handler */ |
312 | * Do restore to match the save instruction from the top-level handler. |
- | 313 | */ |
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- | 314 | restore |
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- | 315 | ||
- | 316 | /* |
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- | 317 | * On execution of retry instruction, CWP will be restored from TSTATE register. |
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- | 318 | * However, because of scheduling, it is possible that CWP in saved TSTATE |
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- | 319 | * is different from current CWP. The following chunk of code fixes CWP |
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- | 320 | * in the saved copy of TSTATE. |
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- | 321 | */ |
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- | 322 | rdpr %cwp, %g4 ! read current CWP |
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- | 323 | and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE |
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- | 324 | or %g1, %g4, %g1 ! write current CWP to TSTATE |
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- | 325 | ||
- | 326 | /* |
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- | 327 | * Restore TSTATE, TPC and TNPC from saved copies. |
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- | 328 | */ |
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- | 329 | wrpr %g1, 0, %tstate |
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- | 330 | wrpr %g2, 0, %tpc |
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- | 331 | wrpr %g3, 0, %tnpc |
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- | 332 | ||
- | 333 | /* |
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- | 334 | * Return from interrupt. |
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- | 335 | */ |
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226 | retry |
336 | retry |