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80 | #define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ |
80 | #define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ |
81 | 81 | ||
82 | 82 | ||
83 | /** LSU Control Register. */ |
83 | /** LSU Control Register. */ |
84 | union lsu_cr_reg { |
84 | union lsu_cr_reg { |
85 | __u64 value; |
85 | uint64_t value; |
86 | struct { |
86 | struct { |
87 | unsigned : 23; |
87 | unsigned : 23; |
88 | unsigned pm : 8; |
88 | unsigned pm : 8; |
89 | unsigned vm : 8; |
89 | unsigned vm : 8; |
90 | unsigned pr : 1; |
90 | unsigned pr : 1; |