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 * Setup the Page Hash Table with no entries.
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 * Setup the Page Hash Table with no entries.
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 *
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 *
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 */
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 */
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void tlb_arch_init(void)
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void tlb_arch_init(void)
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{
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{
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    tlb_invalidate_all();
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}
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void tlb_invalidate_all(void)
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{
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    asm volatile (
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    asm volatile (
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        "tlbia\n"
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        "tlbia\n"
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        "tlbsync\n"
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    );
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    );
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}
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}
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/** Invalidate all entries in TLB that belong to specified address space.
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 *
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 * @param asid This parameter is ignored as the architecture doesn't support it.
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 */
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void tlb_invalidate_all(void)
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void tlb_invalidate_asid(asid_t asid)
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{
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{
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    tlb_invalidate_all();
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}
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}
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/** Invalidate TLB entries for specified page range belonging to specified address space.
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 *
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 * @param asid This parameter is ignored as the architecture doesn't support it.
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 * @param page Address of the first page whose entry is to be invalidated.
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 * @param cnt Number of entries to invalidate.
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 */
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void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
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{
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    tlb_invalidate_all();
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}
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/** Print contents of Page Hash Table. */
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/** Print contents of Page Hash Table. */
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void tlb_print(void)
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void tlb_print(void)
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{
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{
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}
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}