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Line 47... | Line 47... | ||
47 | #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE |
47 | #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE |
48 | 48 | ||
49 | # Save registers to space defined by \r |
49 | # Save registers to space defined by \r |
50 | # We will change status: Disable ERL,EXL,UM,IE |
50 | # We will change status: Disable ERL,EXL,UM,IE |
51 | # These changes will be automatically reversed in REGISTER_LOAD |
51 | # These changes will be automatically reversed in REGISTER_LOAD |
- | 52 | # SP is NOT saved as part of these registers |
|
52 | .macro REGISTERS_STORE_AND_EXC_RESET r |
53 | .macro REGISTERS_STORE_AND_EXC_RESET r |
53 | sw $at,EOFFSET_AT(\r) |
54 | sw $at,EOFFSET_AT(\r) |
54 | sw $v0,EOFFSET_V0(\r) |
55 | sw $v0,EOFFSET_V0(\r) |
55 | sw $v1,EOFFSET_V1(\r) |
56 | sw $v1,EOFFSET_V1(\r) |
56 | sw $a0,EOFFSET_A0(\r) |
57 | sw $a0,EOFFSET_A0(\r) |
Line 85... | Line 86... | ||
85 | sw $s8,EOFFSET_S8(\r) |
86 | sw $s8,EOFFSET_S8(\r) |
86 | #endif |
87 | #endif |
87 | 88 | ||
88 | sw $gp,EOFFSET_GP(\r) |
89 | sw $gp,EOFFSET_GP(\r) |
89 | sw $ra,EOFFSET_RA(\r) |
90 | sw $ra,EOFFSET_RA(\r) |
90 | sw $sp,EOFFSET_SP(\r) |
91 | sw $k1,EOFFSET_K1(\r) |
91 | 92 | ||
92 | mfc0 $t0, $status |
93 | mfc0 $t0, $status |
93 | mfc0 $t1, $epc |
94 | mfc0 $t1, $epc |
94 | 95 | ||
95 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
96 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
Line 141... | Line 142... | ||
141 | lw $s7,EOFFSET_S7(\r) |
142 | lw $s7,EOFFSET_S7(\r) |
142 | lw $s8,EOFFSET_S8(\r) |
143 | lw $s8,EOFFSET_S8(\r) |
143 | #endif |
144 | #endif |
144 | lw $gp,EOFFSET_GP(\r) |
145 | lw $gp,EOFFSET_GP(\r) |
145 | lw $ra,EOFFSET_RA(\r) |
146 | lw $ra,EOFFSET_RA(\r) |
- | 147 | lw $k1,EOFFSET_K1(\r) |
|
146 | 148 | ||
147 | lw $at,EOFFSET_LO(\r) |
149 | lw $at,EOFFSET_LO(\r) |
148 | mtlo $at |
150 | mtlo $at |
149 | lw $at,EOFFSET_HI(\r) |
151 | lw $at,EOFFSET_HI(\r) |
150 | mthi $at |
152 | mthi $at |
Line 205... | Line 207... | ||
205 | 207 | ||
206 | 208 | ||
207 | 209 | ||
208 | exception_handler: |
210 | exception_handler: |
209 | KERNEL_STACK_TO_K0 |
211 | KERNEL_STACK_TO_K0 |
210 | - | ||
211 | mfc0 $k1, $cause |
- | |
212 | sub $k0, REGISTER_SPACE |
212 | sub $k0, REGISTER_SPACE |
- | 213 | sw $sp,EOFFSET_SP($k0) |
|
- | 214 | move $sp, $k0 |
|
213 | 215 | ||
214 | sra $k1, $k1, 0x2 # cp0_exc_cause() part 1 |
- | |
215 | andi $k1, $k1, 0x1f # cp0_exc_cause() part 2 |
216 | mfc0 $k0, $cause |
216 | sub $k1, 8 # 8=SYSCALL |
- | |
217 | 217 | ||
218 | beqz $k1, syscall_shortcut |
218 | sra $k0, $k0, 0x2 # cp0_exc_cause() part 1 |
219 | add $k1, 8 # Revert $k1 back to correct exc number |
219 | andi $k0, $k0, 0x1f # cp0_exc_cause() part 2 |
- | 220 | sub $k0, 8 # 8=SYSCALL |
|
220 | 221 | ||
- | 222 | beqz $k0, syscall_shortcut |
|
- | 223 | add $k0, 8 # Revert $k1 back to correct exc number |
|
- | 224 | ||
221 | REGISTERS_STORE_AND_EXC_RESET $k0 |
225 | REGISTERS_STORE_AND_EXC_RESET $sp |
222 | move $sp, $k0 |
- | |
223 | 226 | ||
224 | move $a1, $sp |
227 | move $a1, $sp |
225 | jal exc_dispatch # exc_dispatch(excno, register_space) |
228 | jal exc_dispatch # exc_dispatch(excno, register_space) |
226 | move $a0, $k1 |
229 | move $a0, $k0 |
227 | 230 | ||
228 | REGISTERS_LOAD $sp |
231 | REGISTERS_LOAD $sp |
229 | # The $sp is automatically restored to former value |
232 | # The $sp is automatically restored to former value |
230 | eret |
233 | eret |
231 | 234 | ||
232 | # it seems that mips reserves some space on stack for varfuncs??? |
235 | # it seems that mips reserves some space on stack for varfuncs??? |
233 | #define SS_ARG4 16 |
236 | #define SS_ARG4 16 |
234 | #define SS_SP 20 |
237 | #define SS_SP EOFFSET_SP |
235 | #define SS_STATUS 24 |
238 | #define SS_STATUS EOFFSET_STATUS |
236 | #define SS_EPC 28 |
239 | #define SS_EPC EOFFSET_EPC |
237 | syscall_shortcut: |
240 | syscall_shortcut: |
238 | # We have a lot of space on the stack, with free use |
241 | # We have a lot of space on the stack, with free use |
239 | sw $sp, SS_SP($k0) |
- | |
240 | move $sp, $k0 |
- | |
241 | - | ||
242 | mfc0 $t1, $epc |
242 | mfc0 $t1, $epc |
243 | mfc0 $t0, $status |
243 | mfc0 $t0, $status |
244 | sw $t1,SS_EPC($sp) # Save EPC |
244 | sw $t1,SS_EPC($sp) # Save EPC |
245 | 245 | ||
246 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
246 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
Line 274... | Line 274... | ||
274 | 274 | ||
275 | tlb_refill_handler: |
275 | tlb_refill_handler: |
276 | KERNEL_STACK_TO_K0 |
276 | KERNEL_STACK_TO_K0 |
277 | sub $k0, REGISTER_SPACE |
277 | sub $k0, REGISTER_SPACE |
278 | REGISTERS_STORE_AND_EXC_RESET $k0 |
278 | REGISTERS_STORE_AND_EXC_RESET $k0 |
- | 279 | sw $sp,EOFFSET_SP($k0) |
|
279 | add $sp, $k0, 0 |
280 | add $sp, $k0, 0 |
280 | 281 | ||
281 | add $a0, $sp, 0 |
282 | add $a0, $sp, 0 |
282 | jal tlb_refill /* tlb_refill(register_space) */ |
283 | jal tlb_refill /* tlb_refill(register_space) */ |
283 | nop |
284 | nop |
Line 286... | Line 287... | ||
286 | 287 | ||
287 | eret |
288 | eret |
288 | 289 | ||
289 | cache_error_handler: |
290 | cache_error_handler: |
290 | KERNEL_STACK_TO_K0 |
291 | KERNEL_STACK_TO_K0 |
291 | sub $sp, REGISTER_SPACE |
292 | sub $k0, REGISTER_SPACE |
292 | REGISTERS_STORE_AND_EXC_RESET $sp |
293 | REGISTERS_STORE_AND_EXC_RESET $k0 |
- | 294 | sw $sp,EOFFSET_SP($k0) |
|
293 | add $sp, $k0, 0 |
295 | add $sp, $k0, 0 |
294 | 296 | ||
295 | jal cache_error |
297 | jal cache_error |
296 | nop |
298 | nop |
297 | 299 |