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#include <arch.h>
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#include <arch.h>
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#include <arch/cp0.h>
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#include <arch/cp0.h>
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#include <time/clock.h>
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#include <time/clock.h>
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#include <arch/drivers/arc.h>
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#include <arch/drivers/arc.h>
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#include <ipc/sysipc.h>
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/** Disable interrupts.
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/** Disable interrupts.
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 *
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 *
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 * @return Old interrupt priority level.
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 * @return Old interrupt priority level.
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 */
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 */
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ipl_t interrupts_disable(void)
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ipl_t interrupts_disable(void)
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}
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}
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static void swint0(int n, istate_t *istate)
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static void swint0(int n, istate_t *istate)
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{
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{
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    cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
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    cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */
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    ipc_irq_send_notif(0);
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}
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}
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static void swint1(int n, istate_t *istate)
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static void swint1(int n, istate_t *istate)
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{
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{
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    cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
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    cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
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    ipc_irq_send_notif(1);
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}
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}
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/* Initialize basic tables for exception dispatching */
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/* Initialize basic tables for exception dispatching */
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void interrupt_init(void)
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void interrupt_init(void)
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{
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{
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    int_register(TIMER_IRQ, "timer", timer_exception);
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    int_register(TIMER_IRQ, "timer", timer_exception);
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    int_register(0, "swint0", swint0);
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    int_register(0, "swint0", swint0);
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    int_register(1, "swint1", swint1);
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    int_register(1, "swint1", swint1);
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}
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}
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#include <print.h>
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static void ipc_int(int n, istate_t *istate)
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{
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    ipc_irq_send_notif(n-INT_OFFSET);
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}
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/* Reregister irq to be IPC-ready */
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void irq_ipc_bind_arch(__native irq)
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{
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    /* Do not allow to redefine timer */
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    /* Swint0, Swint1 are already handled */
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    if (irq == TIMER_IRQ || irq < 2)
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        return;
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    int_register(irq, "ipc_int", ipc_int);
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}