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64 | .global memcpy_from_uspace_failover_address |
64 | .global memcpy_from_uspace_failover_address |
65 | .global memcpy_to_uspace_failover_address |
65 | .global memcpy_to_uspace_failover_address |
66 | memcpy: |
66 | memcpy: |
67 | memcpy_from_uspace: |
67 | memcpy_from_uspace: |
68 | memcpy_to_uspace: |
68 | memcpy_to_uspace: |
- | 69 | srl $t1,$a2,0x2 |
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69 | j _memcpy |
70 | beqz $t1,1f |
- | 71 | move $t0,$zero |
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- | 72 | move $a3,$zero |
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- | 73 | 2: |
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- | 74 | addu $v0,$a1,$a3 |
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- | 75 | lw $v1,0($v0) |
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- | 76 | addiu $t0,$t0,1 |
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- | 77 | addu $v0,$a0,$a3 |
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- | 78 | sw $v1,0($v0) |
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- | 79 | bne $t0,$t1,2b |
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- | 80 | addiu $a3,$a3,4 |
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70 | nop |
81 | 1: |
- | 82 | andi $a2,$a2,0x3 |
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- | 83 | beqz $a2,3f |
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- | 84 | move $a3,$zero |
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- | 85 | sll $v0,$t0,0x2 |
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- | 86 | addu $t1,$a0,$v0 |
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- | 87 | addu $t0,$v0,$a1 |
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- | 88 | 4: |
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- | 89 | addu $v0,$t0,$a3 |
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- | 90 | lbu $a0,0($v0) |
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- | 91 | addu $v1,$t1,$a3 |
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- | 92 | addiu $a3,$a3,1 |
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- | 93 | bne $a3,$a2,4b |
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- | 94 | sb $a0,0($v1) |
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- | 95 | 3: |
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- | 96 | jr $ra |
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- | 97 | move $v0,$a1 |
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71 | 98 | ||
72 | memcpy_from_uspace_failover_address: |
99 | memcpy_from_uspace_failover_address: |
73 | memcpy_to_uspace_failover_address: |
100 | memcpy_to_uspace_failover_address: |
74 | j memcpy_from_uspace_failover_address |
- | |
75 | nop |
101 | jr $ra |
- | 102 | move $v0, $zero |
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76 | 103 | ||
77 | 104 | ||
78 | 105 | ||
79 | .macro fpu_gp_save reg ctx |
106 | .macro fpu_gp_save reg ctx |
80 | mfc1 $t0,$\reg |
107 | mfc1 $t0,$\reg |