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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/register.h>
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#include <arch/register.h>
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#include <arch/mm/page.h>
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#include <align.h>
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#define STACK_ITEMS		12
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#define STACK_ITEMS		13
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#define STACK_FRAME_SIZE	((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE)
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#define STACK_FRAME_SIZE	ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT)
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#if (STACK_FRAME_SIZE % STACK_ALIGNMENT != 0)
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#if (STACK_ITEMS % 2 == 0)
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#	define STACK_FRAME_BIAS	8
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#else
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#error Memory stack must be 16-byte aligned.
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#	define STACK_FRAME_BIAS 16
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#endif
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#endif
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/** Partitioning of bank 0 registers. */
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/** Partitioning of bank 0 registers. */
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#define R_OFFS 		r16
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#define R_OFFS 		r16
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#define R_HANDLER	r17
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#define R_HANDLER	r17
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.global heavyweight_handler
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.global heavyweight_handler
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heavyweight_handler:
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heavyweight_handler:
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    /* 1. copy interrupt registers into bank 0 */
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    /* 1. copy interrupt registers into bank 0 */
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	/*
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	/*
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	 * Note that r24-r31 from bank0 can be used only as long as PSR.ic = 0.
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	 * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0.
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	 */
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	 */
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	mov r24 = cr.iip
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	mov r24 = cr.iip
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	mov r25 = cr.ipsr
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	mov r25 = cr.ipsr
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	mov r26 = cr.iipa
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	mov r26 = cr.iipa
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	mov r27 = cr.isr
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	mov r27 = cr.isr
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    /* 2. preserve predicate register into bank 0 */
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    /* 2. preserve predicate register into bank 0 */
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	mov r29 = pr ;;
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	mov r29 = pr ;;
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    /* 3. switch to kernel memory stack */
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    /* 3. switch to kernel memory stack */
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    	mov r30 = cr.ipsr
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	shr.u r31 = r12, VRN_SHIFT ;;
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	/*
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	/* TODO: support interruptions from userspace */
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	 * Set p6 to true if the stack register references kernel address space.
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	 * Set p7 to false if the stack register doesn't reference kernel address space.
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	 */
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	/* assume kernel stack */
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	cmp.eq p6, p7 = VRN_KERNEL, r31 ;;
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	(p6) shr.u r30 = r30, PSR_CPL_SHIFT ;;
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	(p6) and r30 = PSR_CPL_MASK_SHIFTED, r30 ;;
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	/*
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	 * Set p6 to true if the interrupted context executed in kernel mode.
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	 * Set p7 to false if the interrupted context didn't execute in kernel mode.
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	 */
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	(p6) cmp.eq p6, p7 = r30, r0 ;;
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	/*
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	 * Now, p7 is true iff the stack needs to be switched to kernel stack.
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	 */
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	mov r30 = r12
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	(p7) mov r12 = R_KSTACK ;;
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	add r31 = -8, r12 ;;
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	add r31 = -STACK_FRAME_BIAS, r12 ;;
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	add r12 = -STACK_FRAME_SIZE, r12
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	add r12 = -STACK_FRAME_SIZE, r12
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    /* 4. save registers in bank 0 into memory stack */
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    /* 4. save registers in bank 0 into memory stack */
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	st8 [r31] = r30, -8 ;;		/* save old stack pointer */
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	st8 [r31] = r29, -8 ;;	/* save predicate registers */
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	st8 [r31] = r29, -8 ;;		/* save predicate registers */
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	st8 [r31] = r24, -8 ;;	/* save cr.iip */
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	st8 [r31] = r24, -8 ;;		/* save cr.iip */
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	st8 [r31] = r25, -8 ;;	/* save cr.ipsr */
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	st8 [r31] = r25, -8 ;;		/* save cr.ipsr */
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	st8 [r31] = r26, -8 ;;	/* save cr.iipa */
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	st8 [r31] = r26, -8 ;;		/* save cr.iipa */
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	st8 [r31] = r27, -8 ;;	/* save cr.isr */
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	st8 [r31] = r27, -8 ;;		/* save cr.isr */
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	st8 [r31] = r28, -8	/* save cr.ifa */
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	st8 [r31] = r28, -8 ;;		/* save cr.ifa */
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    /* 5. RSE switch from interrupted context */
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    /* 5. RSE switch from interrupted context */
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	mov r24 = ar.rsc
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	mov r24 = ar.rsc
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	mov r25 = ar.pfs
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	mov r25 = ar.pfs
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	cover
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	cover
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	mov r26 = cr.ifs
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	mov r26 = cr.ifs
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	st8 [r31] = r24, -8;;	/* save ar.rsc */
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	st8 [r31] = r24, -8 ;;	/* save ar.rsc */
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	st8 [r31] = r25, -8;;	/* save ar.pfs */
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	st8 [r31] = r25, -8 ;;	/* save ar.pfs */
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	st8 [r31] = r26, -8	/* save ar.ifs */
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	st8 [r31] = r26, -8	/* save ar.ifs */
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	and r30 = ~3, r24 ;;
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	and r30 = ~3, r24 ;;
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	mov ar.rsc = r30 ;;	/* place RSE in enforced lazy mode */
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	mov ar.rsc = r30 ;;	/* place RSE in enforced lazy mode */
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	mov r29 = ar.bsp
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	mov r29 = ar.bsp
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	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
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	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
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	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
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	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
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	st8 [r31] = r29, -8	/* save ar.bsp */
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	st8 [r31] = r29, -8 	/* save ar.bsp */
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	mov ar.rsc = r24	/* restore RSE's setting */
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	mov ar.rsc = r24	/* restore RSE's setting */
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    /* steps 6 - 15 are done by heavyweight_handler_inner() */
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    /* steps 6 - 15 are done by heavyweight_handler_inner() */
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	mov R_RET = b0 		/* save b0 belonging to interrupted context */
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	mov R_RET = b0 		/* save b0 belonging to interrupted context */
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	mov cr.iipa = r26
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	mov cr.iipa = r26
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	mov cr.isr = r27
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	mov cr.isr = r27
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	mov cr.ifa = r28
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	mov cr.ifa = r28
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    /* 18. restore predicate registers from memory stack */
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    /* 18. restore predicate registers from memory stack */
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	ld8 r29 = [r31] , -8 ;;	/* load predicate registers */
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	ld8 r29 = [r31], +8 ;;	/* load predicate registers */
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	mov pr = r29
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	mov pr = r29
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    /* 19. return from interruption */
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    /* 19. return from interruption */
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    	add r12 = STACK_FRAME_SIZE, r12
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    	ld8 r12 = [r31]		/* load stack pointer */
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	rfi ;;
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	rfi ;;
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.global heavyweight_handler_inner
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.global heavyweight_handler_inner
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heavyweight_handler_inner:
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heavyweight_handler_inner:
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	/*
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	/*