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60 | * |
60 | * |
61 | * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions). |
61 | * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions). |
62 | * This goal is achieved by using procedure calls after RSE becomes operational. |
62 | * This goal is achieved by using procedure calls after RSE becomes operational. |
63 | * |
63 | * |
64 | * Some steps are skipped (enabling and disabling interrupts). |
64 | * Some steps are skipped (enabling and disabling interrupts). |
65 | * Some steps are not fully supported yet (e.g. dealing with floating-point |
- | |
66 | * context). |
- | |
67 | * |
65 | * |
68 | * @param offs Offset from the beginning of IVT. |
66 | * @param offs Offset from the beginning of IVT. |
69 | * @param handler Interrupt handler address. |
67 | * @param handler Interrupt handler address. |
70 | */ |
68 | */ |
71 | .macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler |
69 | .macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler |
Line 81... | Line 79... | ||
81 | 79 | ||
82 | /* |
80 | /* |
83 | * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0. |
81 | * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0. |
84 | */ |
82 | */ |
85 | 83 | ||
86 | /*Set up FPU as in interrupred*/ |
84 | /* Set up FPU as in interrupted context. */ |
87 | mov r24=psr |
85 | mov r24 = psr |
88 | mov r25=cr.ipsr |
86 | mov r25 = cr.ipsr |
89 | mov r26=(PSR_DFH_MASK) |
87 | mov r26 = PSR_DFH_MASK |
90 | mov r27=(~(PSR_DFH_MASK));; |
88 | mov r27 = ~PSR_DFH_MASK ;; |
91 | and r26=r25,r26 |
89 | and r26 = r25, r26 |
92 | and r24=r24,r27;; |
90 | and r24 = r24, r27;; |
93 | or r24=r24,r26;; |
91 | or r24 = r24, r26;; |
94 | mov psr.l=r24;; |
92 | mov psr.l = r24;; |
95 | srlz.i |
93 | srlz.i |
96 | srlz.d;; |
94 | srlz.d;; |
97 | 95 | ||
98 | mov r24 = cr.iip |
96 | mov r24 = cr.iip |
99 | mov r25 = cr.ipsr |
97 | mov r25 = cr.ipsr |
Line 249... | Line 247... | ||
249 | 247 | ||
250 | mov cr.iip = r24;; |
248 | mov cr.iip = r24;; |
251 | mov cr.iipa = r26 |
249 | mov cr.iipa = r26 |
252 | mov cr.isr = r27 |
250 | mov cr.isr = r27 |
253 | mov cr.ifa = r28 |
251 | mov cr.ifa = r28 |
- | 252 | ||
254 | /*Set up FPU as in exception*/ |
253 | /* Set up FPU as in exception. */ |
255 | mov r24=psr |
254 | mov r24 = psr |
256 | mov r26=(PSR_DFH_MASK) |
255 | mov r26 = PSR_DFH_MASK |
257 | mov r27=(~(PSR_DFH_MASK));; |
256 | mov r27 = ~PSR_DFH_MASK ;; |
258 | and r25=r25,r27 |
257 | and r25 = r25, r27 |
259 | and r24=r24,r26;; |
258 | and r24 = r24, r26 ;; |
260 | or r25=r25,r24;; |
259 | or r25 = r25, r24;; |
261 | mov cr.ipsr = r25 |
260 | mov cr.ipsr = r25 |
262 | - | ||
263 | 261 | ||
264 | /* 18. restore predicate registers from memory stack */ |
262 | /* 18. restore predicate registers from memory stack */ |
265 | ld8 r29 = [r31], +8 ;; /* load predicate registers */ |
263 | ld8 r29 = [r31], +8 ;; /* load predicate registers */ |
266 | mov pr = r29 |
264 | mov pr = r29 |
267 | 265 | ||
Line 305... | Line 303... | ||
305 | mov loc14 = b5 |
303 | mov loc14 = b5 |
306 | mov loc15 = b6 |
304 | mov loc15 = b6 |
307 | mov loc16 = b7 |
305 | mov loc16 = b7 |
308 | 306 | ||
309 | /* 8. preserve general and floating-point registers */ |
307 | /* 8. preserve general and floating-point registers */ |
310 | /* TODO: save floating-point context */ |
- | |
311 | mov loc17 = r1 |
308 | mov loc17 = r1 |
312 | mov loc18 = r2 |
309 | mov loc18 = r2 |
313 | mov loc19 = r3 |
310 | mov loc19 = r3 |
314 | mov loc20 = r4 |
311 | mov loc20 = r4 |
315 | mov loc21 = r5 |
312 | mov loc21 = r5 |
Line 338... | Line 335... | ||
338 | mov loc43 = r28 |
335 | mov loc43 = r28 |
339 | mov loc44 = r29 |
336 | mov loc44 = r29 |
340 | mov loc45 = r30 |
337 | mov loc45 = r30 |
341 | mov loc46 = r31 |
338 | mov loc46 = r31 |
342 | 339 | ||
343 | mov r24=96 + STACK_SCRATCH_AREA_SIZE |
340 | add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12 |
344 | mov r25=112 + STACK_SCRATCH_AREA_SIZE |
341 | add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12 |
345 | mov r26=0 + STACK_SCRATCH_AREA_SIZE |
342 | add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12 |
346 | mov r27=16 + STACK_SCRATCH_AREA_SIZE |
343 | add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12 |
347 | mov r28=32 + STACK_SCRATCH_AREA_SIZE |
344 | add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12 |
348 | mov r29=48 + STACK_SCRATCH_AREA_SIZE |
345 | add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12 |
349 | mov r30=64 + STACK_SCRATCH_AREA_SIZE |
346 | add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12 |
350 | mov r31=80 + STACK_SCRATCH_AREA_SIZE;; |
347 | add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;; |
351 | add r24=r12,r24 |
- | |
352 | add r25=r12,r25 |
- | |
353 | add r26=r12,r26 |
- | |
354 | add r27=r12,r27 |
- | |
355 | add r28=r12,r28 |
- | |
356 | add r29=r12,r29 |
- | |
357 | add r30=r12,r30 |
- | |
358 | add r31=r12,r31;; |
- | |
359 | 348 | ||
360 | stf.spill [r26]=f2,0x80 |
349 | stf.spill [r26] = f2, 0x80 |
361 | stf.spill [r27]=f3,0x80 |
350 | stf.spill [r27] = f3, 0x80 |
362 | stf.spill [r28]=f4,0x80 |
351 | stf.spill [r28] = f4, 0x80 |
363 | stf.spill [r29]=f5,0x80 |
352 | stf.spill [r29] = f5, 0x80 |
364 | stf.spill [r30]=f6,0x80 |
353 | stf.spill [r30] = f6, 0x80 |
365 | stf.spill [r31]=f7,0x80;; |
354 | stf.spill [r31] = f7, 0x80 ;; |
366 | 355 | ||
367 | stf.spill [r24]=f8,0x80 |
356 | stf.spill [r24] = f8, 0x80 |
368 | stf.spill [r25]=f9,0x80 |
357 | stf.spill [r25] = f9, 0x80 |
369 | stf.spill [r26]=f10,0x80 |
358 | stf.spill [r26] = f10, 0x80 |
370 | stf.spill [r27]=f11,0x80 |
359 | stf.spill [r27] = f11, 0x80 |
371 | stf.spill [r28]=f12,0x80 |
360 | stf.spill [r28] = f12, 0x80 |
372 | stf.spill [r29]=f13,0x80 |
361 | stf.spill [r29] = f13, 0x80 |
373 | stf.spill [r30]=f14,0x80 |
362 | stf.spill [r30] = f14, 0x80 |
374 | stf.spill [r31]=f15,0x80;; |
363 | stf.spill [r31] = f15, 0x80 ;; |
375 | 364 | ||
376 | stf.spill [r24]=f16,0x80 |
365 | stf.spill [r24] = f16, 0x80 |
377 | stf.spill [r25]=f17,0x80 |
366 | stf.spill [r25] = f17, 0x80 |
378 | stf.spill [r26]=f18,0x80 |
367 | stf.spill [r26] = f18, 0x80 |
379 | stf.spill [r27]=f19,0x80 |
368 | stf.spill [r27] = f19, 0x80 |
380 | stf.spill [r28]=f20,0x80 |
369 | stf.spill [r28] = f20, 0x80 |
381 | stf.spill [r29]=f21,0x80 |
370 | stf.spill [r29] = f21, 0x80 |
382 | stf.spill [r30]=f22,0x80 |
371 | stf.spill [r30] = f22, 0x80 |
383 | stf.spill [r31]=f23,0x80;; |
372 | stf.spill [r31] = f23, 0x80 ;; |
384 | 373 | ||
385 | stf.spill [r24]=f24,0x80 |
374 | stf.spill [r24] = f24, 0x80 |
386 | stf.spill [r25]=f25,0x80 |
375 | stf.spill [r25] = f25, 0x80 |
387 | stf.spill [r26]=f26,0x80 |
376 | stf.spill [r26] = f26, 0x80 |
388 | stf.spill [r27]=f27,0x80 |
377 | stf.spill [r27] = f27, 0x80 |
389 | stf.spill [r28]=f28,0x80 |
378 | stf.spill [r28] = f28, 0x80 |
390 | stf.spill [r29]=f29,0x80 |
379 | stf.spill [r29] = f29, 0x80 |
391 | stf.spill [r30]=f30,0x80 |
380 | stf.spill [r30] = f30, 0x80 |
392 | stf.spill [r31]=f31,0x80;; |
381 | stf.spill [r31] = f31, 0x80 ;; |
393 | 382 | ||
394 | /* preserve Floating point status register */ |
383 | mov loc47 = ar.fpsr /* preserve floating point status register */ |
395 | mov loc47 = ar.fpsr |
- | |
396 | 384 | ||
397 | /* 9. skipped (will not enable interrupts) */ |
385 | /* 9. skipped (will not enable interrupts) */ |
398 | /* |
386 | /* |
399 | * ssm PSR_I_MASK |
387 | * ssm PSR_I_MASK |
400 | * ;; |
388 | * ;; |
Line 416... | Line 404... | ||
416 | * ;; |
404 | * ;; |
417 | * srlz.d |
405 | * srlz.d |
418 | */ |
406 | */ |
419 | 407 | ||
420 | /* 13. restore general and floating-point registers */ |
408 | /* 13. restore general and floating-point registers */ |
421 | /* TODO: restore floating-point context */ |
- | |
422 | mov r24=96 + STACK_SCRATCH_AREA_SIZE |
409 | add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12 |
423 | mov r25=112 + STACK_SCRATCH_AREA_SIZE |
410 | add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12 |
424 | mov r26=0 + STACK_SCRATCH_AREA_SIZE |
411 | add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12 |
425 | mov r27=16 + STACK_SCRATCH_AREA_SIZE |
412 | add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12 |
426 | mov r28=32 + STACK_SCRATCH_AREA_SIZE |
413 | add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12 |
427 | mov r29=48 + STACK_SCRATCH_AREA_SIZE |
414 | add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12 |
428 | mov r30=64 + STACK_SCRATCH_AREA_SIZE |
415 | add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12 |
429 | mov r31=80 + STACK_SCRATCH_AREA_SIZE;; |
416 | add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;; |
430 | add r24=r12,r24 |
- | |
431 | add r25=r12,r25 |
- | |
432 | add r26=r12,r26 |
- | |
433 | add r27=r12,r27 |
- | |
434 | add r28=r12,r28 |
- | |
435 | add r29=r12,r29 |
- | |
436 | add r30=r12,r30 |
- | |
437 | add r31=r12,r31;; |
- | |
438 | 417 | ||
439 | - | ||
440 | ldf.fill f2=[r26],0x80 |
418 | ldf.fill f2 = [r26], 0x80 |
441 | ldf.fill f3=[r27],0x80 |
419 | ldf.fill f3 = [r27], 0x80 |
442 | ldf.fill f4=[r28],0x80 |
420 | ldf.fill f4 = [r28], 0x80 |
443 | ldf.fill f5=[r29],0x80 |
421 | ldf.fill f5 = [r29], 0x80 |
444 | ldf.fill f6=[r30],0x80 |
422 | ldf.fill f6 = [r30], 0x80 |
445 | ldf.fill f7=[r31],0x80;; |
423 | ldf.fill f7 = [r31], 0x80 ;; |
446 | 424 | ||
447 | ldf.fill f8=[r24],0x80 |
425 | ldf.fill f8 = [r24], 0x80 |
448 | ldf.fill f9=[r25],0x80 |
426 | ldf.fill f9 = [r25], 0x80 |
449 | ldf.fill f10=[r26],0x80 |
427 | ldf.fill f10 = [r26], 0x80 |
450 | ldf.fill f11=[r27],0x80 |
428 | ldf.fill f11 = [r27], 0x80 |
451 | ldf.fill f12=[r28],0x80 |
429 | ldf.fill f12 = [r28], 0x80 |
452 | ldf.fill f13=[r29],0x80 |
430 | ldf.fill f13 = [r29], 0x80 |
453 | ldf.fill f14=[r30],0x80 |
431 | ldf.fill f14 = [r30], 0x80 |
454 | ldf.fill f15=[r31],0x80;; |
432 | ldf.fill f15 = [r31], 0x80 ;; |
455 | 433 | ||
456 | ldf.fill f16=[r24],0x80 |
434 | ldf.fill f16 = [r24], 0x80 |
457 | ldf.fill f17=[r25],0x80 |
435 | ldf.fill f17 = [r25], 0x80 |
458 | ldf.fill f18=[r26],0x80 |
436 | ldf.fill f18 = [r26], 0x80 |
459 | ldf.fill f19=[r27],0x80 |
437 | ldf.fill f19 = [r27], 0x80 |
460 | ldf.fill f20=[r28],0x80 |
438 | ldf.fill f20 = [r28], 0x80 |
461 | ldf.fill f21=[r29],0x80 |
439 | ldf.fill f21 = [r29], 0x80 |
462 | ldf.fill f22=[r30],0x80 |
440 | ldf.fill f22 = [r30], 0x80 |
463 | ldf.fill f23=[r31],0x80;; |
441 | ldf.fill f23 = [r31], 0x80 ;; |
464 | 442 | ||
465 | ldf.fill f24=[r24],0x80 |
443 | ldf.fill f24 = [r24], 0x80 |
466 | ldf.fill f25=[r25],0x80 |
444 | ldf.fill f25 = [r25], 0x80 |
467 | ldf.fill f26=[r26],0x80 |
445 | ldf.fill f26 = [r26], 0x80 |
468 | ldf.fill f27=[r27],0x80 |
446 | ldf.fill f27 = [r27], 0x80 |
469 | ldf.fill f28=[r28],0x80 |
447 | ldf.fill f28 = [r28], 0x80 |
470 | ldf.fill f29=[r29],0x80 |
448 | ldf.fill f29 = [r29], 0x80 |
471 | ldf.fill f30=[r30],0x80 |
449 | ldf.fill f30 = [r30], 0x80 |
472 | ldf.fill f31=[r31],0x80;; |
450 | ldf.fill f31 = [r31], 0x80 ;; |
473 | - | ||
474 | 451 | ||
475 | mov r1 = loc17 |
452 | mov r1 = loc17 |
476 | mov r2 = loc18 |
453 | mov r2 = loc18 |
477 | mov r3 = loc19 |
454 | mov r3 = loc19 |
478 | mov r4 = loc20 |
455 | mov r4 = loc20 |
Line 501... | Line 478... | ||
501 | mov r27 = loc42 |
478 | mov r27 = loc42 |
502 | mov r28 = loc43 |
479 | mov r28 = loc43 |
503 | mov r29 = loc44 |
480 | mov r29 = loc44 |
504 | mov r30 = loc45 |
481 | mov r30 = loc45 |
505 | mov r31 = loc46 |
482 | mov r31 = loc46 |
506 | 483 | ||
507 | /* restore Floating point status register */ |
484 | mov ar.fpsr = loc47 /* restore floating point status register */ |
508 | mov ar.fpsr = loc47 |
- | |
509 | 485 | ||
510 | /* 14. restore branch and application registers */ |
486 | /* 14. restore branch and application registers */ |
511 | mov ar.unat = loc3 |
487 | mov ar.unat = loc3 |
512 | mov ar.lc = loc4 |
488 | mov ar.lc = loc4 |
513 | mov ar.ec = loc5 |
489 | mov ar.ec = loc5 |
Line 605... | Line 581... | ||
605 | HEAVYWEIGHT_HANDLER 0x7b00 |
581 | HEAVYWEIGHT_HANDLER 0x7b00 |
606 | HEAVYWEIGHT_HANDLER 0x7c00 |
582 | HEAVYWEIGHT_HANDLER 0x7c00 |
607 | HEAVYWEIGHT_HANDLER 0x7d00 |
583 | HEAVYWEIGHT_HANDLER 0x7d00 |
608 | HEAVYWEIGHT_HANDLER 0x7e00 |
584 | HEAVYWEIGHT_HANDLER 0x7e00 |
609 | HEAVYWEIGHT_HANDLER 0x7f00 |
585 | HEAVYWEIGHT_HANDLER 0x7f00 |
610 | - | ||
611 | - | ||
612 | - | ||
613 | - |