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Rev 1702 | Rev 1780 | ||
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Line 280... | Line 280... | ||
280 | ); |
280 | ); |
281 | } |
281 | } |
282 | 282 | ||
283 | void fpu_enable(void) |
283 | void fpu_enable(void) |
284 | { |
284 | { |
285 | __u64 a = 0 ; |
285 | uint64_t a = 0 ; |
286 | asm volatile( |
286 | asm volatile( |
287 | "rsm %0;;" |
287 | "rsm %0;;" |
288 | "srlz.i\n" |
288 | "srlz.i\n" |
289 | "srlz.d;;\n" |
289 | "srlz.d;;\n" |
290 | : |
290 | : |
Line 302... | Line 302... | ||
302 | } |
302 | } |
303 | 303 | ||
304 | void fpu_disable(void) |
304 | void fpu_disable(void) |
305 | { |
305 | { |
306 | 306 | ||
307 | __u64 a = 0 ; |
307 | uint64_t a = 0 ; |
308 | asm volatile( |
308 | asm volatile( |
309 | "ssm %0;;\n" |
309 | "ssm %0;;\n" |
310 | "srlz.i\n" |
310 | "srlz.i\n" |
311 | "srlz.d;;\n" |
311 | "srlz.d;;\n" |
312 | : |
312 | : |
Line 323... | Line 323... | ||
323 | 323 | ||
324 | } |
324 | } |
325 | 325 | ||
326 | void fpu_init(void) |
326 | void fpu_init(void) |
327 | { |
327 | { |
328 | __u64 a = 0 ; |
328 | uint64_t a = 0 ; |
329 | asm volatile |
329 | asm volatile |
330 | ( |
330 | ( |
331 | "mov %0=ar.fpsr;;\n" |
331 | "mov %0=ar.fpsr;;\n" |
332 | "or %0=%0,%1;;\n" |
332 | "or %0=%0,%1;;\n" |
333 | "mov ar.fpsr=%0;;\n" |
333 | "mov ar.fpsr=%0;;\n" |