WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/mm/page.h



 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64mm 
 * @{
 */
/** @file
 */
 

#define VRN_KERNEL          7LL
#endif
 
#define REGION_REGISTERS        8
 
#define KA2PA(x)    ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
#define PA2KA(x)    ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
#define VHPT_WIDTH          20          /* 1M */
#define VHPT_SIZE           (1 << VHPT_WIDTH)
 
#define PTA_BASE_SHIFT          15

   
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    uint64_t ig3 : 64;
} __attribute__ ((packed));
 
struct vhpt_entry_not_present {
    /* Word 0 */
    unsigned p : 1;

 
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    uint64_t ig3 : 64;
} __attribute__ ((packed));
 
typedef union vhpt_entry {
    struct vhpt_entry_present present;
    struct vhpt_entry_not_present not_present;
    uint64_t word[4];
} vhpt_entry_t;
 
struct region_register_map {
    unsigned ve : 1;
    unsigned : 1;

    unsigned long long base : 49;
} __attribute__ ((packed));
 
typedef union pta_register {
    struct pta_register_map map;
    uint64_t word;
} pta_register;
 
/** Return Translation Hashed Entry Address.
 *
 * VRN bits are used to read RID (ASID) from one

 *
 * @param va Virtual address including VRN bits.
 *
 * @return Address of the head of VHPT collision chain.
 */
static inline uint64_t thash(uint64_t va)
{
    uint64_t ret;
 
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}

 *
 * @param va Virtual address including VRN bits.
 *
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
 */
static inline uint64_t ttag(uint64_t va)
{
    uint64_t ret;
 
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}

 *
 * @param i Region register index.
 *
 * @return Current contents of rr[i].
 */
static inline uint64_t rr_read(index_t i)
{
    uint64_t ret;
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
    return ret;
}
 
/** Write Region Register.
 *
 * @param i Region register index.
 * @param v Value to be written to rr[i].
 */
static inline void rr_write(index_t i, uint64_t v)
{
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile (
        "mov rr[%0] = %1\n"
        :

 
/** Read Page Table Register.
 *
 * @return Current value stored in PTA.
 */
static inline uint64_t pta_read(void)
{
    uint64_t ret;
   
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
   
    return ret;
}
 
/** Write Page Table Register.
 *
 * @param v New value to be stored in PTA.
 */
static inline void pta_write(uint64_t v)
{
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
}
 
extern void page_arch_init(void);
 
extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
 */
 

Rev 1702	Rev 1780
Line 25...	Line 25...
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup ia64mm	30	/** @addtogroup ia64mm
31	* @{	31	* @{
32	*/	32	*/
33	/** @file	33	/** @file
34	*/	34	*/
35		35
Line 59...	Line 59...
59	#define VRN_KERNEL 7LL	59	#define VRN_KERNEL 7LL
60	#endif	60	#endif
61		61
62	#define REGION_REGISTERS 8	62	#define REGION_REGISTERS 8
63		63
64	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))	64	#define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
65	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))	65	#define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
66		66
67	#define VHPT_WIDTH 20 /* 1M */	67	#define VHPT_WIDTH 20 /* 1M */
68	#define VHPT_SIZE (1 << VHPT_WIDTH)	68	#define VHPT_SIZE (1 << VHPT_WIDTH)
69		69
70	#define PTA_BASE_SHIFT 15	70	#define PTA_BASE_SHIFT 15
Line 124...	Line 124...
124		124
125	/* Word 2 */	125	/* Word 2 */
126	union vhpt_tag tag;	126	union vhpt_tag tag;
127		127
128	/* Word 3 */	128	/* Word 3 */
129	__u64 ig3 : 64;	129	uint64_t ig3 : 64;
130	} __attribute__ ((packed));	130	} __attribute__ ((packed));
131		131
132	struct vhpt_entry_not_present {	132	struct vhpt_entry_not_present {
133	/* Word 0 */	133	/* Word 0 */
134	unsigned p : 1;	134	unsigned p : 1;
Line 142...	Line 142...
142		142
143	/* Word 2 */	143	/* Word 2 */
144	union vhpt_tag tag;	144	union vhpt_tag tag;
145		145
146	/* Word 3 */	146	/* Word 3 */
147	__u64 ig3 : 64;	147	uint64_t ig3 : 64;
148	} __attribute__ ((packed));	148	} __attribute__ ((packed));
149		149
150	typedef union vhpt_entry {	150	typedef union vhpt_entry {
151	struct vhpt_entry_present present;	151	struct vhpt_entry_present present;
152	struct vhpt_entry_not_present not_present;	152	struct vhpt_entry_not_present not_present;
153	__u64 word[4];	153	uint64_t word[4];
154	} vhpt_entry_t;	154	} vhpt_entry_t;
155		155
156	struct region_register_map {	156	struct region_register_map {
157	unsigned ve : 1;	157	unsigned ve : 1;
158	unsigned : 1;	158	unsigned : 1;
Line 175...	Line 175...
175	unsigned long long base : 49;	175	unsigned long long base : 49;
176	} __attribute__ ((packed));	176	} __attribute__ ((packed));
177		177
178	typedef union pta_register {	178	typedef union pta_register {
179	struct pta_register_map map;	179	struct pta_register_map map;
180	__u64 word;	180	uint64_t word;
181	} pta_register;	181	} pta_register;
182		182
183	/** Return Translation Hashed Entry Address.	183	/** Return Translation Hashed Entry Address.
184	*	184	*
185	* VRN bits are used to read RID (ASID) from one	185	* VRN bits are used to read RID (ASID) from one
Line 187...	Line 187...
187	*	187	*
188	* @param va Virtual address including VRN bits.	188	* @param va Virtual address including VRN bits.
189	*	189	*
190	* @return Address of the head of VHPT collision chain.	190	* @return Address of the head of VHPT collision chain.
191	*/	191	*/
192	static inline __u64 thash(__u64 va)	192	static inline uint64_t thash(uint64_t va)
193	{	193	{
194	__u64 ret;	194	uint64_t ret;
195		195
196	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));	196	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
197		197
198	return ret;	198	return ret;
199	}	199	}
Line 205...	Line 205...
205	*	205	*
206	* @param va Virtual address including VRN bits.	206	* @param va Virtual address including VRN bits.
207	*	207	*
208	* @return The unique tag for VPN and RID in the collision chain returned by thash().	208	* @return The unique tag for VPN and RID in the collision chain returned by thash().
209	*/	209	*/
210	static inline __u64 ttag(__u64 va)	210	static inline uint64_t ttag(uint64_t va)
211	{	211	{
212	__u64 ret;	212	uint64_t ret;
213		213
214	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));	214	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
215		215
216	return ret;	216	return ret;
217	}	217	}
Line 220...	Line 220...
220	*	220	*
221	* @param i Region register index.	221	* @param i Region register index.
222	*	222	*
223	* @return Current contents of rr[i].	223	* @return Current contents of rr[i].
224	*/	224	*/
225	static inline __u64 rr_read(index_t i)	225	static inline uint64_t rr_read(index_t i)
226	{	226	{
227	__u64 ret;	227	uint64_t ret;
228	ASSERT(i < REGION_REGISTERS);	228	ASSERT(i < REGION_REGISTERS);
229	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));	229	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
230	return ret;	230	return ret;
231	}	231	}
232		232
233	/** Write Region Register.	233	/** Write Region Register.
234	*	234	*
235	* @param i Region register index.	235	* @param i Region register index.
236	* @param v Value to be written to rr[i].	236	* @param v Value to be written to rr[i].
237	*/	237	*/
238	static inline void rr_write(index_t i, __u64 v)	238	static inline void rr_write(index_t i, uint64_t v)
239	{	239	{
240	ASSERT(i < REGION_REGISTERS);	240	ASSERT(i < REGION_REGISTERS);
241	__asm__ volatile (	241	__asm__ volatile (
242	"mov rr[%0] = %1\n"	242	"mov rr[%0] = %1\n"
243	:	243	:
Line 247...	Line 247...
247		247
248	/** Read Page Table Register.	248	/** Read Page Table Register.
249	*	249	*
250	* @return Current value stored in PTA.	250	* @return Current value stored in PTA.
251	*/	251	*/
252	static inline __u64 pta_read(void)	252	static inline uint64_t pta_read(void)
253	{	253	{
254	__u64 ret;	254	uint64_t ret;
255		255
256	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));	256	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
257		257
258	return ret;	258	return ret;
259	}	259	}
260		260
261	/** Write Page Table Register.	261	/** Write Page Table Register.
262	*	262	*
263	* @param v New value to be stored in PTA.	263	* @param v New value to be stored in PTA.
264	*/	264	*/
265	static inline void pta_write(__u64 v)	265	static inline void pta_write(uint64_t v)
266	{	266	{
267	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));	267	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
268	}	268	}
269		269
270	extern void page_arch_init(void);	270	extern void page_arch_init(void);
271		271
272	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);	272	extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
273	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);	273	extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
274	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);	274	extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
275		275
276	#endif /* __ASM__ */	276	#endif /* __ASM__ */
277		277
278	#endif /* KERNEL */	278	#endif /* KERNEL */
279		279
280	#endif	280	#endif
281		281
282	/** @}	282	/** @}
283	*/	283	*/
284		-

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/include/mm/page.h @ 1754 – Rev 1702 → 1780