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| 33 | #include <arch.h> |
33 | #include <arch.h> |
| 34 | #include <arch/context.h> /* SP_DELTA */ |
34 | #include <arch/context.h> /* SP_DELTA */ |
| 35 | #include <arch/debugger.h> |
35 | #include <arch/debugger.h> |
| 36 | #include <arch/pm.h> |
36 | #include <arch/pm.h> |
| 37 | #include <arch/asm.h> |
37 | #include <arch/asm.h> |
| 38 | #include <adt/bitmap.h> |
38 | #include <arch/ddi/ddi.h> |
| 39 | #include <print.h> |
- | |
| 40 | 39 | ||
| 41 | /** Perform ia32 specific tasks needed before the new task is run. |
40 | /** Perform ia32 specific tasks needed before the new task is run. |
| 42 | * |
41 | * |
| 43 | * Interrupts are disabled. |
42 | * Interrupts are disabled. |
| 44 | */ |
43 | */ |
| 45 | void before_task_runs_arch(void) |
44 | void before_task_runs_arch(void) |
| 46 | { |
45 | { |
| 47 | count_t bits; |
- | |
| 48 | ptr_16_32_t cpugdtr; |
- | |
| 49 | descriptor_t *gdt_p; |
- | |
| 50 | - | ||
| 51 | /* |
- | |
| 52 | * Switch the I/O Permission Bitmap, if necessary. |
- | |
| 53 | */ |
- | |
| 54 | - | ||
| 55 | /* First, copy the I/O Permission Bitmap. */ |
- | |
| 56 | spinlock_lock(&TASK->lock); |
- | |
| 57 | if ((bits = TASK->arch.iomap.bits)) { |
- | |
| 58 | bitmap_t iomap; |
46 | io_perm_bitmap_install(); |
| 59 | - | ||
| 60 | ASSERT(TASK->arch.iomap.map); |
- | |
| 61 | bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8); |
- | |
| 62 | bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
- | |
| 63 | /* |
- | |
| 64 | * It is safe to set the trailing eight bits because of the extra |
- | |
| 65 | * convenience byte in TSS_IOMAP_SIZE. |
- | |
| 66 | */ |
- | |
| 67 | bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8); |
- | |
| 68 | } |
- | |
| 69 | spinlock_unlock(&TASK->lock); |
- | |
| 70 | - | ||
| 71 | /* Second, adjust TSS segment limit. */ |
- | |
| 72 | gdtr_store(&cpugdtr); |
- | |
| 73 | gdt_p = (descriptor_t *) cpugdtr.base; |
- | |
| 74 | gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1); |
- | |
| 75 | gdtr_load(&cpugdtr); |
- | |
| 76 | - | ||
| 77 | /* |
- | |
| 78 | * Before we load new TSS limit, the current TSS descriptor |
- | |
| 79 | * type must be changed to describe inactive TSS. |
- | |
| 80 | */ |
- | |
| 81 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
- | |
| 82 | tr_load(selector(TSS_DES)); |
- | |
| 83 | } |
47 | } |
| 84 | 48 | ||
| 85 | /** Perform ia32 specific tasks needed before the new thread is scheduled. |
49 | /** Perform ia32 specific tasks needed before the new thread is scheduled. |
| 86 | * |
50 | * |
| 87 | * THREAD is locked and interrupts are disabled. |
51 | * THREAD is locked and interrupts are disabled. |