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| Rev 1112 | Rev 1186 | ||
|---|---|---|---|
| Line 176... | Line 176... | ||
| 176 | /* |
176 | /* |
| 177 | * Update addresses in GDT and IDT to their virtual counterparts. |
177 | * Update addresses in GDT and IDT to their virtual counterparts. |
| 178 | */ |
178 | */ |
| 179 | idtr.limit = sizeof(idt); |
179 | idtr.limit = sizeof(idt); |
| 180 | idtr.base = (__address) idt; |
180 | idtr.base = (__address) idt; |
| 181 | __asm__ volatile ("lgdt %0\n" : : "m" (gdtr)); |
181 | gdtr_load(&gdtr); |
| 182 | __asm__ volatile ("lidt %0\n" : : "m" (idtr)); |
182 | idtr_load(&idtr); |
| 183 | 183 | ||
| 184 | /* |
184 | /* |
| 185 | * Each CPU has its private GDT and TSS. |
185 | * Each CPU has its private GDT and TSS. |
| 186 | * All CPUs share one IDT. |
186 | * All CPUs share one IDT. |
| 187 | */ |
187 | */ |
| Line 211... | Line 211... | ||
| 211 | 211 | ||
| 212 | /* |
212 | /* |
| 213 | * As of this moment, the current CPU has its own GDT pointing |
213 | * As of this moment, the current CPU has its own GDT pointing |
| 214 | * to its own TSS. We just need to load the TR register. |
214 | * to its own TSS. We just need to load the TR register. |
| 215 | */ |
215 | */ |
| 216 | __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
216 | tr_load(selector(TSS_DES)); |
| 217 | 217 | ||
| 218 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
218 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
| 219 | clean_AM_flag(); /* Disable alignment check */ |
219 | clean_AM_flag(); /* Disable alignment check */ |
| 220 | } |
220 | } |
| 221 | 221 | ||
| 222 | void set_tls_desc(__address tls) |
222 | void set_tls_desc(__address tls) |
| 223 | { |
223 | { |
| 224 | struct ptr_16_32 cpugdtr; |
224 | struct ptr_16_32 cpugdtr; |
| 225 | struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base; |
225 | struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base; |
| 226 | 226 | ||
| 227 | __asm__ volatile ("sgdt %0\n" : : "m" (cpugdtr)); |
227 | gdtr_store(&cpugdtr); |
| 228 | - | ||
| 229 | gdt_setbase(&gdt_p[TLS_DES], tls); |
228 | gdt_setbase(&gdt_p[TLS_DES], tls); |
| 230 | /* Reload gdt register to update GS in CPU */ |
229 | /* Reload gdt register to update GS in CPU */ |
| 231 | __asm__ volatile ("lgdt %0\n" : : "m" (cpugdtr)); |
230 | gdtr_load(&cpugdtr); |
| 232 | } |
231 | } |