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Line 36... | Line 36... | ||
36 | #include <arch/pm.h> |
36 | #include <arch/pm.h> |
37 | #include <errno.h> |
37 | #include <errno.h> |
38 | #include <arch/cpu.h> |
38 | #include <arch/cpu.h> |
39 | #include <cpu.h> |
39 | #include <cpu.h> |
40 | #include <arch.h> |
40 | #include <arch.h> |
- | 41 | #include <align.h> |
|
41 | 42 | ||
42 | /** Enable I/O space range for task. |
43 | /** Enable I/O space range for task. |
43 | * |
44 | * |
44 | * Interrupts are disabled and task is locked. |
45 | * Interrupts are disabled and task is locked. |
45 | * |
46 | * |
Line 139... | Line 140... | ||
139 | bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
140 | bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
140 | /* |
141 | /* |
141 | * It is safe to set the trailing eight bits because of the extra |
142 | * It is safe to set the trailing eight bits because of the extra |
142 | * convenience byte in TSS_IOMAP_SIZE. |
143 | * convenience byte in TSS_IOMAP_SIZE. |
143 | */ |
144 | */ |
144 | bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8); |
145 | bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8); |
145 | } |
146 | } |
146 | spinlock_unlock(&TASK->lock); |
147 | spinlock_unlock(&TASK->lock); |
147 | 148 | ||
- | 149 | /* |
|
148 | /* Second, adjust TSS segment limit. */ |
150 | * Second, adjust TSS segment limit. |
- | 151 | * Take the extra ending byte with all bits set into account. |
|
- | 152 | */ |
|
149 | gdtr_store(&cpugdtr); |
153 | gdtr_store(&cpugdtr); |
150 | gdt_p = (descriptor_t *) cpugdtr.base; |
154 | gdt_p = (descriptor_t *) cpugdtr.base; |
151 | gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1); |
155 | gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits)); |
152 | gdtr_load(&cpugdtr); |
156 | gdtr_load(&cpugdtr); |
153 | 157 | ||
154 | /* |
158 | /* |
155 | * Before we load new TSS limit, the current TSS descriptor |
159 | * Before we load new TSS limit, the current TSS descriptor |
156 | * type must be changed to describe inactive TSS. |
160 | * type must be changed to describe inactive TSS. |