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Line 37... Line 37...
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/* local APIC macros */
38
/* local APIC macros */
39
#define IPI_INIT    0
39
#define IPI_INIT    0
40
#define IPI_STARTUP 0
40
#define IPI_STARTUP 0
41
 
41
 
-
 
42
/** Delivery modes. */
42
#define DLVRMODE_FIXED  (0<<8)
43
#define DELMOD_FIXED    0x0
-
 
44
#define DELMOD_LOWPRI   0x1
-
 
45
#define DELMOD_SMI  0x2
-
 
46
/* 0x3 reserved */
-
 
47
#define DELMOD_NMI  0x4
43
#define DLVRMODE_INIT   (5<<8)
48
#define DELMOD_INIT 0x5
44
#define DLVRMODE_STUP   (6<<8)
49
#define DELMOD_STARTUP  0x6
-
 
50
#define DELMOD_EXTINT   0x7
-
 
51
 
-
 
52
/** Destination modes. */
45
#define DESTMODE_PHYS   (0<<11)
53
#define DESTMOD_PHYS    0x0
46
#define DESTMODE_LOGIC  (1<<11)
54
#define DESTMOD_LOGIC   0x1
-
 
55
 
-
 
56
/** Trigger Modes. */
-
 
57
#define TRIGMOD_EDGE    0x0
47
#define LEVEL_ASSERT    (1<<14)
58
#define TRIGMOD_LEVEL   0x1
-
 
59
 
-
 
60
/** Levels. */
48
#define LEVEL_DEASSERT  (0<<14)
61
#define LEVEL_DEASSERT  0x0
49
#define TRGRMODE_LEVEL  (1<<15)
62
#define LEVEL_ASSERT    0x1
-
 
63
 
-
 
64
/** Destination Shorthands. */
50
#define TRGRMODE_EDGE   (0<<15)
65
#define SHORTHAND_NONE      0x0
51
#define SHORTHAND_DEST  (0<<18)
66
#define SHORTHAND_SELF      0x1
52
#define SHORTHAND_INCL  (2<<18)
67
#define SHORTHAND_ALL_INCL  0x2
53
#define SHORTHAND_EXCL  (3<<18)
68
#define SHORTHAND_ALL_EXCL  0x3
-
 
69
 
-
 
70
/** Interrupt Input Pin Polarities. */
-
 
71
#define POLARITY_HIGH   0x0
-
 
72
#define POLARITY_LOW    0x1
54
 
73
 
55
#define SEND_PENDING    (1<<12)
74
#define SEND_PENDING    (1<<12)
56
 
75
 
57
/* Interrupt Command Register */
76
/** Interrupt Command Register. */
58
#define ICRlo       (0x300/sizeof(__u32))
77
#define ICRlo       (0x300/sizeof(__u32))
59
#define ICRhi       (0x310/sizeof(__u32))
78
#define ICRhi       (0x310/sizeof(__u32))
-
 
79
struct icr {
-
 
80
    union {
-
 
81
        __u32 lo;
-
 
82
        struct {
-
 
83
            __u8 vector;            /**< Interrupt Vector. */
-
 
84
            unsigned delmod : 3;        /**< Delivery Mode. */
-
 
85
            unsigned destmod : 1;       /**< Destination Mode. */
-
 
86
            unsigned delivs : 1;        /**< Delivery status (RO). */
-
 
87
            unsigned : 1;           /**< Reserved. */
-
 
88
            unsigned level : 1;     /**< Level. */
60
#define ICRloClear  ((1<<13)|(3<<16)|(0xfff<<20))
89
            unsigned trigger_mode : 1;  /**< Trigger Mode. */
61
#define ICRhiClear  (0xffffff<<0)
90
            unsigned : 2;           /**< Reserved. */
-
 
91
            unsigned shorthand : 2;     /**< Destination Shorthand. */
-
 
92
            unsigned : 12;          /**< Reserved. */
-
 
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        } __attribute__ ((packed));
-
 
94
    };
-
 
95
    union {
-
 
96
        __u32 hi;
-
 
97
        struct {
-
 
98
            unsigned : 24;          /**< Reserved. */
-
 
99
            __u8 dest;          /**< Destination field. */
-
 
100
        } __attribute__ ((packed));
-
 
101
    };
-
 
102
} __attribute__ ((packed));
-
 
103
typedef struct icr icr_t;
62
 
104
 
63
/* End Of Interrupt */
105
/* End Of Interrupt */
64
#define EOI     (0x0b0/sizeof(__u32))
106
#define EOI     (0x0b0/sizeof(__u32))
65
 
107
 
66
/* Error Status Register */
108
/* Error Status Register */
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111
 
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/* Task Priority Register */
112
/* Task Priority Register */
71
#define TPR     (0x080/sizeof(__u32))
113
#define TPR     (0x080/sizeof(__u32))
72
#define TPRClear    0xffffff00
114
#define TPRClear    0xffffff00
73
 
115
 
74
/* Spurious Vector Register */
116
/** Spurious-Interrupt Vector Register. */
75
#define SVR     (0x0f0/sizeof(__u32))
117
#define SVR     (0x0f0/sizeof(__u32))
-
 
118
union svr {
-
 
119
    __u32 value;
-
 
120
    struct {
-
 
121
        __u8 vector;            /**< Spurious Vector */
-
 
122
        unsigned lapic_enabled : 1; /**< APIC Software Enable/Disable */
-
 
123
        unsigned focus_checking : 1;    /**< Focus Processor Checking */
-
 
124
        unsigned : 22;          /**< Reserved. */
76
#define SVRClear    (~0x3f0)
125
    } __attribute__ ((packed));
-
 
126
};
-
 
127
typedef union svr svr_t;
77
 
128
 
78
/* Time Divide Configuratio Register */
129
/* Time Divide Configuration Register */
79
#define TDCR        (0x3e0/sizeof(__u32))
130
#define TDCR        (0x3e0/sizeof(__u32))
80
#define TDCRClear   (~0xb)
131
#define TDCRClear   (~0xb)
81
 
132
 
82
/* Initial Count Register for Timer */
133
/* Initial Count Register for Timer */
83
#define ICRT        (0x380/sizeof(__u32))
134
#define ICRT        (0x380/sizeof(__u32))
84
 
135
 
85
/* Current Count Register for Timer */
136
/* Current Count Register for Timer */
86
#define CCRT        (0x390/sizeof(__u32))
137
#define CCRT        (0x390/sizeof(__u32))
87
 
138
 
88
/* LVT */
139
/** Timer Modes. */
-
 
140
#define TIMER_ONESHOT   0x0
-
 
141
#define TIMER_PERIODIC  0x1
-
 
142
 
-
 
143
/** LVT Timer register. */
89
#define LVT_Tm      (0x320/sizeof(__u32))
144
#define LVT_Tm      (0x320/sizeof(__u32))
-
 
145
union lvt_tm {
-
 
146
    __u32 value;
-
 
147
    struct {
-
 
148
        __u8 vector;        /**< Local Timer Interrupt vector. */
-
 
149
        unsigned : 4;       /**< Reserved. */
-
 
150
        unsigned delivs : 1;    /**< Delivery status (RO). */
-
 
151
        unsigned : 3;       /**< Reserved. */
-
 
152
        unsigned masked : 1;    /**< Interrupt Mask. */
-
 
153
        unsigned mode : 1;  /**< Timer Mode. */
-
 
154
        unsigned : 14;      /**< Reserved. */
-
 
155
    } __attribute__ ((packed));
-
 
156
};
-
 
157
typedef union lvt_tm lvt_tm_t;
-
 
158
 
-
 
159
/** LVT LINT registers. */
90
#define LVT_LINT0   (0x350/sizeof(__u32))
160
#define LVT_LINT0   (0x350/sizeof(__u32))
91
#define LVT_LINT1   (0x360/sizeof(__u32))
161
#define LVT_LINT1   (0x360/sizeof(__u32))
-
 
162
union lvt_lint {
-
 
163
    __u32 value;
-
 
164
    struct {
-
 
165
        __u8 vector;            /**< LINT Interrupt vector. */
-
 
166
        unsigned delmod : 3;        /**< Delivery Mode. */
-
 
167
        unsigned : 1;           /**< Reserved. */
-
 
168
        unsigned delivs : 1;        /**< Delivery status (RO). */
-
 
169
        unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
-
 
170
        unsigned irr : 1;       /**< Remote IRR (RO). */
-
 
171
        unsigned trigger_mode : 1;  /**< Trigger Mode. */
-
 
172
        unsigned masked : 1;        /**< Interrupt Mask. */
-
 
173
        unsigned : 15;          /**< Reserved. */
-
 
174
    } __attribute__ ((packed));
-
 
175
};
-
 
176
typedef union lvt_lint lvt_lint_t;
-
 
177
 
-
 
178
/** LVT Error register. */
92
#define LVT_Err     (0x370/sizeof(__u32))
179
#define LVT_Err     (0x370/sizeof(__u32))
-
 
180
union lvt_error {
-
 
181
    __u32 value;
-
 
182
    struct {
-
 
183
        __u8 vector;        /**< Local Timer Interrupt vector. */
-
 
184
        unsigned : 4;       /**< Reserved. */
-
 
185
        unsigned delivs : 1;    /**< Delivery status (RO). */
-
 
186
        unsigned : 3;       /**< Reserved. */
-
 
187
        unsigned masked : 1;    /**< Interrupt Mask. */
-
 
188
        unsigned : 15;      /**< Reserved. */
-
 
189
    } __attribute__ ((packed));
-
 
190
};
-
 
191
typedef union lvt_error lvt_error_t;
-
 
192
 
-
 
193
 
93
#define LVT_PCINT   (0x340/sizeof(__u32))
194
#define LVT_PCINT   (0x340/sizeof(__u32))
94
 
195
 
95
/* Local APIC ID Register */
196
/* Local APIC ID Register */
96
#define L_APIC_ID   (0x020/sizeof(__u32))
197
#define L_APIC_ID   (0x020/sizeof(__u32))
97
#define L_APIC_IDClear  (~(0xf<<24))
198
#define L_APIC_IDClear  (~(0xf<<24))
Line 112... Line 213...
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#define IOAPICID    0x00
213
#define IOAPICID    0x00
113
#define IOAPICVER   0x01
214
#define IOAPICVER   0x01
114
#define IOAPICARB   0x02
215
#define IOAPICARB   0x02
115
#define IOREDTBL    0x10
216
#define IOREDTBL    0x10
116
 
217
 
117
/** Delivery modes. */
-
 
118
#define DELMOD_FIXED    0x0
-
 
119
#define DELMOD_LOWPRI   0x1
-
 
120
#define DELMOD_SMI  0x2
-
 
121
/* 0x3 reserved */
-
 
122
#define DELMOD_NMI  0x4
-
 
123
#define DELMOD_INIT 0x5
-
 
124
/* 0x6 reserved */
-
 
125
#define DELMOD_EXTINT   0x7
-
 
126
 
-
 
127
/** Destination modes. */
-
 
128
#define DESTMOD_PHYS    0x0
-
 
129
#define DESTMOD_LOGIC   0x1
-
 
130
 
-
 
131
/** Trigger Modes. */
-
 
132
#define TRIGMOD_EDGE    0x0
-
 
133
#define TRIGMOD_LEVEL   0x1
-
 
134
 
-
 
135
/** Interrupt Input Pin Polarities. */
-
 
136
#define POLARITY_HIGH   0x0
-
 
137
#define POLARITY_LOW    0x1
-
 
138
 
-
 
139
/** I/O Redirection Register. */
218
/** I/O Redirection Register. */
140
struct io_redirection_reg {
219
struct io_redirection_reg {
141
    union {
220
    union {
142
        __u32 lo;
221
        __u32 lo;
143
        struct {
222
        struct {
144
            unsigned intvec : 8;        /**< Interrupt Vector. */
223
            __u8 intvec;            /**< Interrupt Vector. */
145
            unsigned delmod : 3;        /**< Delivery Mode. */
224
            unsigned delmod : 3;        /**< Delivery Mode. */
146
            unsigned destmod : 1;       /**< Destination mode. */
225
            unsigned destmod : 1;       /**< Destination mode. */
147
            unsigned delivs : 1;        /**< Delivery status (RO). */
226
            unsigned delivs : 1;        /**< Delivery status (RO). */
148
            unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
227
            unsigned intpol : 1;        /**< Interrupt Input Pin Polarity. */
149
            unsigned irr : 1;       /**< Remote IRR (RO). */
228
            unsigned irr : 1;       /**< Remote IRR (RO). */
150
            unsigned trigger_mode : 1;  /**< Trigger Mode. */
229
            unsigned trigger_mode : 1;  /**< Trigger Mode. */
151
            unsigned masked : 1;        /**< Interrupt Mask. */
230
            unsigned masked : 1;        /**< Interrupt Mask. */
152
            unsigned : 15;          /**< Reserved. */
231
            unsigned : 15;          /**< Reserved. */
153
        };
232
        } __attribute__ ((packed));
154
    };
233
    };
155
    union {
234
    union {
156
        __u32 hi;
235
        __u32 hi;
157
        struct {
236
        struct {
158
            unsigned : 24;          /**< Reserved. */
237
            unsigned : 24;          /**< Reserved. */
159
            unsigned dest : 8;      /**< Destination Field. */
238
            __u8 dest : 8;      /**< Destination Field. */
160
        };
239
        } __attribute__ ((packed));
161
    };
240
    };
162
   
241
   
163
} __attribute__ ((packed));
242
} __attribute__ ((packed));
164
 
243
 
165
typedef struct io_redirection_reg io_redirection_reg_t;
244
typedef struct io_redirection_reg io_redirection_reg_t;