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55 | /* This is _mess_ - the 64-bit CS is argument+16, |
55 | /* This is _mess_ - the 64-bit CS is argument+16, |
56 | * the SS is argument+8. The order is: |
56 | * the SS is argument+8. The order is: |
57 | * +0(KDATA_DES), +8(UDATA_DES), +16(UTEXT_DES) |
57 | * +0(KDATA_DES), +8(UDATA_DES), +16(UTEXT_DES) |
58 | */ |
58 | */ |
59 | write_msr(AMD_MSR_STAR, |
59 | write_msr(AMD_MSR_STAR, |
60 | ((__u64)(gdtselector(KDATA_DES) | PL_USER)<<48) \ |
60 | ((uint64_t)(gdtselector(KDATA_DES) | PL_USER)<<48) \ |
61 | | ((__u64)(gdtselector(KTEXT_DES) | PL_KERNEL)<<32)); |
61 | | ((uint64_t)(gdtselector(KTEXT_DES) | PL_KERNEL)<<32)); |
62 | write_msr(AMD_MSR_LSTAR, (__u64)syscall_entry); |
62 | write_msr(AMD_MSR_LSTAR, (uint64_t)syscall_entry); |
63 | /* Mask RFLAGS on syscall |
63 | /* Mask RFLAGS on syscall |
64 | * - disable interrupts, until we exchange the stack register |
64 | * - disable interrupts, until we exchange the stack register |
65 | * (mask the IE bit) |
65 | * (mask the IE bit) |
66 | */ |
66 | */ |
67 | write_msr(AMD_MSR_SFMASK, 0x200); |
67 | write_msr(AMD_MSR_SFMASK, 0x200); |