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| 34 | #include <arch/context.h> /* SP_DELTA */ |
34 | #include <arch/context.h> /* SP_DELTA */ |
| 35 | #include <arch/asm.h> |
35 | #include <arch/asm.h> |
| 36 | #include <arch/debugger.h> |
36 | #include <arch/debugger.h> |
| 37 | #include <print.h> |
37 | #include <print.h> |
| 38 | #include <arch/pm.h> |
38 | #include <arch/pm.h> |
| 39 | #include <adt/bitmap.h> |
39 | #include <arch/ddi/ddi.h> |
| 40 | 40 | ||
| 41 | /** Perform amd64 specific tasks needed before the new task is run. |
41 | /** Perform amd64 specific tasks needed before the new task is run. |
| 42 | * |
42 | * |
| 43 | * Interrupts are disabled. |
43 | * Interrupts are disabled. |
| 44 | */ |
44 | */ |
| 45 | void before_task_runs_arch(void) |
45 | void before_task_runs_arch(void) |
| 46 | { |
46 | { |
| 47 | count_t bits; |
- | |
| 48 | ptr_16_64_t cpugdtr; |
- | |
| 49 | descriptor_t *gdt_p; |
- | |
| 50 | tss_descriptor_t *tss_desc; |
- | |
| 51 | - | ||
| 52 | /* |
- | |
| 53 | * Switch the I/O Permission Bitmap, if necessary. |
- | |
| 54 | */ |
- | |
| 55 | - | ||
| 56 | /* First, copy the I/O Permission Bitmap. */ |
- | |
| 57 | spinlock_lock(&TASK->lock); |
- | |
| 58 | if ((bits = TASK->arch.iomap.bits)) { |
- | |
| 59 | bitmap_t iomap; |
47 | io_perm_bitmap_install(); |
| 60 | - | ||
| 61 | ASSERT(TASK->arch.iomap.map); |
- | |
| 62 | bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8); |
- | |
| 63 | bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits); |
- | |
| 64 | /* |
- | |
| 65 | * It is safe to set the trailing eight bits because of the extra |
- | |
| 66 | * convenience byte in TSS_IOMAP_SIZE. |
- | |
| 67 | */ |
- | |
| 68 | bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8); |
- | |
| 69 | } |
- | |
| 70 | spinlock_unlock(&TASK->lock); |
- | |
| 71 | - | ||
| 72 | /* Second, adjust TSS segment limit. */ |
- | |
| 73 | gdtr_store(&cpugdtr); |
- | |
| 74 | gdt_p = (descriptor_t *) cpugdtr.base; |
- | |
| 75 | gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1); |
- | |
| 76 | gdtr_load(&cpugdtr); |
- | |
| 77 | - | ||
| 78 | /* |
- | |
| 79 | * Before we load new TSS limit, the current TSS descriptor |
- | |
| 80 | * type must be changed to describe inactive TSS. |
- | |
| 81 | */ |
- | |
| 82 | tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES]; |
- | |
| 83 | tss_desc->type = AR_TSS; |
- | |
| 84 | tr_load(gdtselector(TSS_DES)); |
- | |
| 85 | } |
48 | } |
| 86 | 49 | ||
| 87 | /** Perform amd64 specific tasks needed before the new thread is scheduled. */ |
50 | /** Perform amd64 specific tasks needed before the new thread is scheduled. */ |
| 88 | void before_thread_runs_arch(void) |
51 | void before_thread_runs_arch(void) |
| 89 | { |
52 | { |