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| Rev 1289 | Rev 1292 | ||
|---|---|---|---|
| Line 108... | Line 108... | ||
| 108 | /* TSS descriptor - set up will be completed later, |
108 | /* TSS descriptor - set up will be completed later, |
| 109 | * on AMD64 it is 64-bit - 2 items in table */ |
109 | * on AMD64 it is 64-bit - 2 items in table */ |
| 110 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
110 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
| 111 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
111 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
| 112 | /* VESA Init descriptor */ |
112 | /* VESA Init descriptor */ |
| - | 113 | #ifdef CONFIG_FB |
|
| 113 | { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 } |
114 | { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 } |
| - | 115 | #endif |
|
| 114 | }; |
116 | }; |
| 115 | 117 | ||
| 116 | idescriptor_t idt[IDT_ITEMS]; |
118 | idescriptor_t idt[IDT_ITEMS]; |
| 117 | 119 | ||
| 118 | ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt }; |
120 | ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt }; |