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Rev 4377 | Rev 4692 | ||
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Line 77... | Line 77... | ||
77 | * @param asid Address space, if required by type. |
77 | * @param asid Address space, if required by type. |
78 | * @param page Virtual page address, if required by type. |
78 | * @param page Virtual page address, if required by type. |
79 | * @param count Number of pages, if required by type. |
79 | * @param count Number of pages, if required by type. |
80 | */ |
80 | */ |
81 | void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid, |
81 | void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid, |
82 | uintptr_t page, count_t count) |
82 | uintptr_t page, size_t count) |
83 | { |
83 | { |
84 | unsigned int i; |
84 | unsigned int i; |
85 | 85 | ||
86 | CPU->tlb_active = 0; |
86 | CPU->tlb_active = 0; |
87 | spinlock_lock(&tlblock); |
87 | spinlock_lock(&tlblock); |
Line 106... | Line 106... | ||
106 | cpu->tlb_messages[0].count = 0; |
106 | cpu->tlb_messages[0].count = 0; |
107 | } else { |
107 | } else { |
108 | /* |
108 | /* |
109 | * Enqueue the message. |
109 | * Enqueue the message. |
110 | */ |
110 | */ |
111 | index_t idx = cpu->tlb_messages_count++; |
111 | size_t idx = cpu->tlb_messages_count++; |
112 | cpu->tlb_messages[idx].type = type; |
112 | cpu->tlb_messages[idx].type = type; |
113 | cpu->tlb_messages[idx].asid = asid; |
113 | cpu->tlb_messages[idx].asid = asid; |
114 | cpu->tlb_messages[idx].page = page; |
114 | cpu->tlb_messages[idx].page = page; |
115 | cpu->tlb_messages[idx].count = count; |
115 | cpu->tlb_messages[idx].count = count; |
116 | } |
116 | } |
Line 141... | Line 141... | ||
141 | void tlb_shootdown_ipi_recv(void) |
141 | void tlb_shootdown_ipi_recv(void) |
142 | { |
142 | { |
143 | tlb_invalidate_type_t type; |
143 | tlb_invalidate_type_t type; |
144 | asid_t asid; |
144 | asid_t asid; |
145 | uintptr_t page; |
145 | uintptr_t page; |
146 | count_t count; |
146 | size_t count; |
147 | unsigned int i; |
147 | unsigned int i; |
148 | 148 | ||
149 | ASSERT(CPU); |
149 | ASSERT(CPU); |
150 | 150 | ||
151 | CPU->tlb_active = 0; |
151 | CPU->tlb_active = 0; |