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53 | #define TSTATE_CWP_MASK 0x1f |
53 | #define TSTATE_CWP_MASK 0x1f |
54 | 54 | ||
55 | #define WSTATE_NORMAL(n) (n) |
55 | #define WSTATE_NORMAL(n) (n) |
56 | #define WSTATE_OTHER(n) ((n) << 3) |
56 | #define WSTATE_OTHER(n) ((n) << 3) |
57 | 57 | ||
- | 58 | /* |
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- | 59 | * The following definitions concern the UPA_CONFIG register on US and the |
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58 | #define UPA_CONFIG_MID_SHIFT 17 |
60 | * FIREPLANE_CONFIG register on US3. |
- | 61 | */ |
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59 | #define UPA_CONFIG_MID_MASK 0x1f |
62 | #define ICBUS_CONFIG_MID_SHIFT 17 |
60 | 63 | ||
61 | #endif |
64 | #endif |
62 | 65 | ||
63 | /** @} |
66 | /** @} |
64 | */ |
67 | */ |