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Rev 2787 Rev 3597
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#define KERNEL_TRANSLATION_I  0x0010000000000661
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#define KERNEL_TRANSLATION_I  0x0010000000000661
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#define KERNEL_TRANSLATION_D  0x0010000000000661
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#define KERNEL_TRANSLATION_D  0x0010000000000661
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#define KERNEL_TRANSLATION_VIO 0x0010000000000671
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#define KERNEL_TRANSLATION_VIO 0x0010000000000671
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#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
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#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
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#define VIO_OFFSET            0x0002000000000000
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#define IO_OFFSET             0x0001000000000000
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#define KERNEL_TRANSLATION_FW 0x00100000F0000671
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.section K_TEXT_START, "ax"
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.section K_TEXT_START, "ax"
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stack0:
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stack0:
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kernel_image_start:
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kernel_image_start:
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	.auto
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	.auto
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- 
 
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#identifi self(CPU) in OS structures by ID / EID
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	mov r9=cr64
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	mov r10=1
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	movl r12=0xffffffff
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	movl r8=cpu_by_id_eid_list
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	and r8=r8,r12
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	shr r9=r9,16
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	add r8=r8,r9
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	st1 [r8]=r10
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	mov psr.l = r0
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	mov psr.l = r0
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	srlz.i
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	srlz.i
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	srlz.d
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	srlz.d
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	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
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	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
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	mov cr.ifa = r8
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	mov cr.ifa = r8
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	movl r10 = (KERNEL_TRANSLATION_IO)
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	movl r10 = (KERNEL_TRANSLATION_IO)
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	itr.d dtr[r7] = r10
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	itr.d dtr[r7] = r10
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- 
 
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#setup mapping for fimware arrea (also SAPIC)
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	mov r11 = cr.itir ;;
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	movl r10 = ~0xfc;;
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	and r10 =r10 , r11  ;;
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	movl r11 = (FW_PAGE_WIDTH << PS_SHIFT);;
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	or r10 =r10 , r11  ;;
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	mov cr.itir = r10;;
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	movl r7 = 3
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	movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
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	mov cr.ifa = r8
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	movl r10 = (KERNEL_TRANSLATION_FW)
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	itr.d dtr[r7] = r10
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	# initialize PSR
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	# initialize PSR
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	movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK)  /* Enable paging */
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	movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK)  /* Enable paging */
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	mov r9 = psr
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	mov r9 = psr
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	 * Now we are paging.
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	 * Now we are paging.
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	 */
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	 */
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	# switch to register bank 1
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	# switch to register bank 1
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	bsw.1
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	bsw.1
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#Am'I BSP or AP
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	movl r20=bsp_started;;
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	ld8 r20=[r20];;
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	cmp.eq p3,p2=r20,r0;;
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	# initialize register stack
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	# initialize register stack
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	mov ar.rsc = r0
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	mov ar.rsc = r0
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	movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
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	movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
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	mov ar.bspstore = r8
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	mov ar.bspstore = r8
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	movl r20 = (VRN_KERNEL << VRN_SHIFT);;
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	movl r20 = (VRN_KERNEL << VRN_SHIFT);;
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	or r20 = r20,r1;;
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	or r20 = r20,r1;;
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	movl r1 = _hardcoded_load_address
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	movl r1 = _hardcoded_load_address
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	/*
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	/*
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	 * Initialize hardcoded_* variables.
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	 * Initialize hardcoded_* variables. Do only BSP
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	 */
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	 */
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	movl r14 = _hardcoded_ktext_size
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(p3)	movl r14 = _hardcoded_ktext_size
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	movl r15 = _hardcoded_kdata_size
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(p3)	movl r15 = _hardcoded_kdata_size
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	movl r16 = _hardcoded_load_address ;;
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(p3)	movl r16 = _hardcoded_load_address ;;
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	addl r17 = @gprel(hardcoded_ktext_size), gp
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(p3)	addl r17 = @gprel(hardcoded_ktext_size), gp
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	addl r18 = @gprel(hardcoded_kdata_size), gp
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(p3)	addl r18 = @gprel(hardcoded_kdata_size), gp
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	addl r19 = @gprel(hardcoded_load_address), gp
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(p3)	addl r19 = @gprel(hardcoded_load_address), gp
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	addl r21 = @gprel(bootinfo), gp
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(p3)	addl r21 = @gprel(bootinfo), gp
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	;;
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	;;
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	st8 [r17] = r14
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(p3)	st8 [r17] = r14
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	st8 [r18] = r15
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(p3)	st8 [r18] = r15
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	st8 [r19] = r16
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(p3)	st8 [r19] = r16
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	st8 [r21] = r20
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(p3)	st8 [r21] = r20
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	ssm (1 << 19) ;; /* Disable f32 - f127 */
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	ssm (1 << 19) ;; /* Disable f32 - f127 */
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	srlz.i
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	srlz.i
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	srlz.d ;;
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	srlz.d ;;
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(p2)	movl r18 = main_ap ;;
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(p2)   	mov b1 = r18 ;;
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(p2)	br.call.sptk.many b0 = b1
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#Mark that BSP is on
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	mov r20=1;;
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	movl r21=bsp_started;;
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	st8 [r21]=r20;;
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	br.call.sptk.many b0 = arch_pre_main
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	br.call.sptk.many b0 = arch_pre_main
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	movl r18 = main_bsp ;;
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	movl r18 = main_bsp ;;
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	mov b1 = r18 ;;
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	mov b1 = r18 ;;
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	br.call.sptk.many b0 = b1
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	br.call.sptk.many b0 = b1
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0:
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0:
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	br 0b
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	br 0b
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.align 4096
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kernel_image_ap_start:
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	.auto
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#identifi self(CPU) in OS structures by ID / EID
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	mov r9=cr64
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	mov r10=1
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	movl r12=0xffffffff
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	movl r8=cpu_by_id_eid_list
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	and r8=r8,r12
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	shr r9=r9,16
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	add r8=r8,r9
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	st1 [r8]=r10
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#wait for wakeup sychro signal (#3 in cpu_by_id_eid_list)
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kernel_image_ap_start_loop:
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 250 
	movl r11=kernel_image_ap_start_loop
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	and r11=r11,r12
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 252 
   	mov b1 = r11
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	ld1 r20=[r8];;
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	movl r21=3;;
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	cmp.eq p2,p3=r20,r21;;
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(p3)br.call.sptk.many b0 = b1
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 259 
	movl r11=kernel_image_start
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 260 
	and r11=r11,r12
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    mov b1 = r11
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	br.call.sptk.many b0 = b1
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.align 16
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.global bsp_started
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bsp_started:
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.space 8
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.align 4096
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.global cpu_by_id_eid_list
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cpu_by_id_eid_list:
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.space 65536
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