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Rev 4377 | Rev 4692 | ||
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50 | "+m" (val->count) : "i" (imm)); |
50 | "+m" (val->count) : "i" (imm)); |
51 | 51 | ||
52 | return v; |
52 | return v; |
53 | } |
53 | } |
54 | 54 | ||
55 | - | ||
56 | static inline uint64_t test_and_set(atomic_t *val) { |
55 | static inline uint64_t test_and_set(atomic_t *val) |
- | 56 | { |
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57 | uint64_t v; |
57 | uint64_t v; |
58 | 58 | ||
59 | asm volatile ( |
59 | asm volatile ( |
60 | "movl %0 = 0x01;;\n" |
60 | "movl %0 = 0x1;;\n" |
61 | "xchg8 %0 = %1, %0;;\n" |
61 | "xchg8 %0 = %1, %0;;\n" |
62 | : "=r" (v), "+m" (val->count) |
62 | : "=r" (v), "+m" (val->count) |
63 | ); |
63 | ); |
64 | 64 | ||
65 | return v; |
65 | return v; |
66 | } |
66 | } |
67 | 67 | ||
- | 68 | static inline void atomic_lock_arch(atomic_t *val) |
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- | 69 | { |
|
- | 70 | do { |
|
- | 71 | while (val->count) |
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- | 72 | ; |
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- | 73 | } while (test_and_set(val)); |
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- | 74 | } |
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68 | 75 | ||
69 | static inline void atomic_inc(atomic_t *val) |
76 | static inline void atomic_inc(atomic_t *val) |
70 | { |
77 | { |
71 | atomic_add(val, 1); |
78 | atomic_add(val, 1); |
72 | } |
79 | } |