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| Rev 4377 | Rev 4692 | ||
|---|---|---|---|
| Line 37... | Line 37... | ||
| 37 | #include <arch/memstr.h> |
37 | #include <arch/memstr.h> |
| 38 | #include <arch/regutils.h> |
38 | #include <arch/regutils.h> |
| 39 | #include <interrupt.h> |
39 | #include <interrupt.h> |
| 40 | #include <arch/mm/page_fault.h> |
40 | #include <arch/mm/page_fault.h> |
| 41 | #include <arch/barrier.h> |
41 | #include <arch/barrier.h> |
| 42 | #include <arch/drivers/gxemul.h> |
- | |
| 43 | #include <print.h> |
42 | #include <print.h> |
| 44 | #include <syscall/syscall.h> |
43 | #include <syscall/syscall.h> |
| 45 | #include <udebug/udebug.h> |
44 | #include <udebug/udebug.h> |
| 46 | 45 | ||
| - | 46 | #ifdef MACHINE_testarm |
|
| - | 47 | #include <arch/mach/testarm/testarm.h> |
|
| - | 48 | #endif |
|
| - | 49 | ||
| - | 50 | #ifdef MACHINE_integratorcp |
|
| - | 51 | #include <arch/mach/integratorcp/integratorcp.h> |
|
| - | 52 | #endif |
|
| - | 53 | ||
| 47 | /** Offset used in calculation of exception handler's relative address. |
54 | /** Offset used in calculation of exception handler's relative address. |
| 48 | * |
55 | * |
| 49 | * @see install_handler() |
56 | * @see install_handler() |
| 50 | */ |
57 | */ |
| 51 | #define PREFETCH_OFFSET 0x8 |
58 | #define PREFETCH_OFFSET 0x8 |
| Line 57... | Line 64... | ||
| 57 | #define EXC_VECTORS 8 |
64 | #define EXC_VECTORS 8 |
| 58 | 65 | ||
| 59 | /** Size of memory block occupied by exception vectors. */ |
66 | /** Size of memory block occupied by exception vectors. */ |
| 60 | #define EXC_VECTORS_SIZE (EXC_VECTORS * 4) |
67 | #define EXC_VECTORS_SIZE (EXC_VECTORS * 4) |
| 61 | 68 | ||
| 62 | /** Switches to kernel stack and saves all registers there. |
- | |
| 63 | * |
- | |
| 64 | * Temporary exception stack is used to save a few registers |
- | |
| 65 | * before stack switch takes place. |
- | |
| 66 | * |
- | |
| 67 | */ |
- | |
| 68 | inline static void setup_stack_and_save_regs() |
- | |
| 69 | { |
- | |
| 70 | asm volatile ( |
- | |
| 71 | "ldr r13, =exc_stack\n" |
- | |
| 72 | "stmfd r13!, {r0}\n" |
- | |
| 73 | "mrs r0, spsr\n" |
- | |
| 74 | "and r0, r0, #0x1f\n" |
- | |
| 75 | "cmp r0, #0x10\n" |
- | |
| 76 | "bne 1f\n" |
- | |
| 77 | - | ||
| 78 | /* prev mode was usermode */ |
- | |
| 79 | "ldmfd r13!, {r0}\n" |
- | |
| 80 | "ldr r13, =supervisor_sp\n" |
- | |
| 81 | "ldr r13, [r13]\n" |
- | |
| 82 | "stmfd r13!, {lr}\n" |
- | |
| 83 | "stmfd r13!, {r0-r12}\n" |
- | |
| 84 | "stmfd r13!, {r13, lr}^\n" |
- | |
| 85 | "mrs r0, spsr\n" |
- | |
| 86 | "stmfd r13!, {r0}\n" |
- | |
| 87 | "b 2f\n" |
- | |
| 88 | - | ||
| 89 | /* mode was not usermode */ |
- | |
| 90 | "1:\n" |
- | |
| 91 | "stmfd r13!, {r1, r2, r3}\n" |
- | |
| 92 | "mrs r1, cpsr\n" |
- | |
| 93 | "mov r2, lr\n" |
- | |
| 94 | "bic r1, r1, #0x1f\n" |
- | |
| 95 | "orr r1, r1, r0\n" |
- | |
| 96 | "mrs r0, cpsr\n" |
- | |
| 97 | "msr cpsr_c, r1\n" |
- | |
| 98 | - | ||
| 99 | "mov r3, r13\n" |
- | |
| 100 | "stmfd r13!, {r2}\n" |
- | |
| 101 | "mov r2, lr\n" |
- | |
| 102 | "stmfd r13!, {r4-r12}\n" |
- | |
| 103 | "mov r1, r13\n" |
- | |
| 104 | - | ||
| 105 | /* the following two lines are for debugging */ |
- | |
| 106 | "mov sp, #0\n" |
- | |
| 107 | "mov lr, #0\n" |
- | |
| 108 | "msr cpsr_c, r0\n" |
- | |
| 109 | - | ||
| 110 | "ldmfd r13!, {r4, r5, r6, r7}\n" |
- | |
| 111 | "stmfd r1!, {r4, r5, r6}\n" |
- | |
| 112 | "stmfd r1!, {r7}\n" |
- | |
| 113 | "stmfd r1!, {r2}\n" |
- | |
| 114 | "stmfd r1!, {r3}\n" |
- | |
| 115 | "mrs r0, spsr\n" |
- | |
| 116 | "stmfd r1!, {r0}\n" |
- | |
| 117 | "mov r13, r1\n" |
- | |
| 118 | - | ||
| 119 | "2:\n" |
- | |
| 120 | ); |
- | |
| 121 | } |
- | |
| 122 | - | ||
| 123 | /** Returns from exception mode. |
- | |
| 124 | * |
- | |
| 125 | * Previously saved state of registers (including control register) |
- | |
| 126 | * is restored from the stack. |
- | |
| 127 | */ |
- | |
| 128 | inline static void load_regs() |
- | |
| 129 | { |
- | |
| 130 | asm volatile( |
- | |
| 131 | "ldmfd r13!, {r0} \n" |
- | |
| 132 | "msr spsr, r0 \n" |
- | |
| 133 | "and r0, r0, #0x1f \n" |
- | |
| 134 | "cmp r0, #0x10 \n" |
- | |
| 135 | "bne 1f \n" |
- | |
| 136 | - | ||
| 137 | /* return to user mode */ |
- | |
| 138 | "ldmfd r13!, {r13, lr}^ \n" |
- | |
| 139 | "b 2f \n" |
- | |
| 140 | - | ||
| 141 | /* return to non-user mode */ |
- | |
| 142 | "1:\n" |
- | |
| 143 | "ldmfd r13!, {r1, r2} \n" |
- | |
| 144 | "mrs r3, cpsr \n" |
- | |
| 145 | "bic r3, r3, #0x1f \n" |
- | |
| 146 | "orr r3, r3, r0 \n" |
- | |
| 147 | "mrs r0, cpsr \n" |
- | |
| 148 | "msr cpsr_c, r3 \n" |
- | |
| 149 | - | ||
| 150 | "mov r13, r1 \n" |
- | |
| 151 | "mov lr, r2 \n" |
- | |
| 152 | "msr cpsr_c, r0 \n" |
- | |
| 153 | - | ||
| 154 | /* actual return */ |
- | |
| 155 | "2:\n" |
- | |
| 156 | "ldmfd r13, {r0-r12, pc}^\n" |
- | |
| 157 | ); |
- | |
| 158 | } |
- | |
| 159 | - | ||
| 160 | - | ||
| 161 | /** Switch CPU to mode in which interrupts are serviced (currently it |
- | |
| 162 | * is Undefined mode). |
- | |
| 163 | * |
- | |
| 164 | * The default mode for interrupt servicing (Interrupt Mode) |
- | |
| 165 | * can not be used because of nested interrupts (which can occur |
- | |
| 166 | * because interrupts are enabled in higher levels of interrupt handler). |
- | |
| 167 | */ |
- | |
| 168 | inline static void switch_to_irq_servicing_mode() |
- | |
| 169 | { |
- | |
| 170 | /* switch to Undefined mode */ |
- | |
| 171 | asm volatile( |
- | |
| 172 | /* save regs used during switching */ |
- | |
| 173 | "stmfd sp!, {r0-r3} \n" |
- | |
| 174 | - | ||
| 175 | /* save stack pointer and link register to r1, r2 */ |
- | |
| 176 | "mov r1, sp \n" |
- | |
| 177 | "mov r2, lr \n" |
- | |
| 178 | - | ||
| 179 | /* mode switch */ |
- | |
| 180 | "mrs r0, cpsr \n" |
- | |
| 181 | "bic r0, r0, #0x1f \n" |
- | |
| 182 | "orr r0, r0, #0x1b \n" |
- | |
| 183 | "msr cpsr_c, r0 \n" |
- | |
| 184 | - | ||
| 185 | /* restore saved sp and lr */ |
- | |
| 186 | "mov sp, r1 \n" |
- | |
| 187 | "mov lr, r2 \n" |
- | |
| 188 | - | ||
| 189 | /* restore original regs */ |
- | |
| 190 | "ldmfd sp!, {r0-r3} \n" |
- | |
| 191 | ); |
- | |
| 192 | } |
- | |
| 193 | - | ||
| 194 | /** Calls exception dispatch routine. */ |
- | |
| 195 | #define CALL_EXC_DISPATCH(exception) \ |
- | |
| 196 | asm volatile ( \ |
- | |
| 197 | "mov r0, %[exc]\n" \ |
- | |
| 198 | "mov r1, r13\n" \ |
- | |
| 199 | "bl exc_dispatch\n" \ |
- | |
| 200 | :: [exc] "i" (exception) \ |
- | |
| 201 | );\ |
- | |
| 202 | - | ||
| 203 | /** General exception handler. |
- | |
| 204 | * |
- | |
| 205 | * Stores registers, dispatches the exception, |
- | |
| 206 | * and finally restores registers and returns from exception processing. |
- | |
| 207 | * |
- | |
| 208 | * @param exception Exception number. |
- | |
| 209 | */ |
- | |
| 210 | #define PROCESS_EXCEPTION(exception) \ |
- | |
| 211 | setup_stack_and_save_regs(); \ |
- | |
| 212 | CALL_EXC_DISPATCH(exception) \ |
- | |
| 213 | load_regs(); |
- | |
| 214 | - | ||
| 215 | /** Updates specified exception vector to jump to given handler. |
69 | /** Updates specified exception vector to jump to given handler. |
| 216 | * |
70 | * |
| 217 | * Addresses of handlers are stored in memory following exception vectors. |
71 | * Addresses of handlers are stored in memory following exception vectors. |
| 218 | */ |
72 | */ |
| 219 | static void install_handler(unsigned handler_addr, unsigned *vector) |
73 | static void install_handler(unsigned handler_addr, unsigned *vector) |
| Line 231... | Line 85... | ||
| 231 | /* store handler's address */ |
85 | /* store handler's address */ |
| 232 | *(vector + EXC_VECTORS) = handler_addr; |
86 | *(vector + EXC_VECTORS) = handler_addr; |
| 233 | 87 | ||
| 234 | } |
88 | } |
| 235 | 89 | ||
| 236 | /** Low-level Reset Exception handler. */ |
- | |
| 237 | static void reset_exception_entry(void) |
- | |
| 238 | { |
- | |
| 239 | PROCESS_EXCEPTION(EXC_RESET); |
- | |
| 240 | } |
- | |
| 241 | - | ||
| 242 | /** Low-level Software Interrupt Exception handler. */ |
- | |
| 243 | static void swi_exception_entry(void) |
- | |
| 244 | { |
- | |
| 245 | PROCESS_EXCEPTION(EXC_SWI); |
- | |
| 246 | } |
- | |
| 247 | - | ||
| 248 | /** Low-level Undefined Instruction Exception handler. */ |
- | |
| 249 | static void undef_instr_exception_entry(void) |
- | |
| 250 | { |
- | |
| 251 | PROCESS_EXCEPTION(EXC_UNDEF_INSTR); |
- | |
| 252 | } |
- | |
| 253 | - | ||
| 254 | /** Low-level Fast Interrupt Exception handler. */ |
- | |
| 255 | static void fiq_exception_entry(void) |
- | |
| 256 | { |
- | |
| 257 | PROCESS_EXCEPTION(EXC_FIQ); |
- | |
| 258 | } |
- | |
| 259 | - | ||
| 260 | /** Low-level Prefetch Abort Exception handler. */ |
- | |
| 261 | static void prefetch_abort_exception_entry(void) |
- | |
| 262 | { |
- | |
| 263 | asm volatile ( |
- | |
| 264 | "sub lr, lr, #4" |
- | |
| 265 | ); |
- | |
| 266 | - | ||
| 267 | PROCESS_EXCEPTION(EXC_PREFETCH_ABORT); |
- | |
| 268 | } |
- | |
| 269 | - | ||
| 270 | /** Low-level Data Abort Exception handler. */ |
- | |
| 271 | static void data_abort_exception_entry(void) |
- | |
| 272 | { |
- | |
| 273 | asm volatile ( |
- | |
| 274 | "sub lr, lr, #8" |
- | |
| 275 | ); |
- | |
| 276 | - | ||
| 277 | PROCESS_EXCEPTION(EXC_DATA_ABORT); |
- | |
| 278 | } |
- | |
| 279 | - | ||
| 280 | /** Low-level Interrupt Exception handler. |
- | |
| 281 | * |
- | |
| 282 | * CPU is switched to Undefined mode before further interrupt processing |
- | |
| 283 | * because of possible occurence of nested interrupt exception, which |
- | |
| 284 | * would overwrite (and thus spoil) stack pointer. |
- | |
| 285 | */ |
- | |
| 286 | static void irq_exception_entry(void) |
- | |
| 287 | { |
- | |
| 288 | asm volatile ( |
- | |
| 289 | "sub lr, lr, #4" |
- | |
| 290 | ); |
- | |
| 291 | - | ||
| 292 | setup_stack_and_save_regs(); |
- | |
| 293 | - | ||
| 294 | switch_to_irq_servicing_mode(); |
- | |
| 295 | - | ||
| 296 | CALL_EXC_DISPATCH(EXC_IRQ) |
- | |
| 297 | - | ||
| 298 | load_regs(); |
- | |
| 299 | } |
- | |
| 300 | - | ||
| 301 | /** Software Interrupt handler. |
90 | /** Software Interrupt handler. |
| 302 | * |
91 | * |
| 303 | * Dispatches the syscall. |
92 | * Dispatches the syscall. |
| 304 | */ |
93 | */ |
| 305 | static void swi_exception(int exc_no, istate_t *istate) |
94 | static void swi_exception(int exc_no, istate_t *istate) |
| 306 | { |
95 | { |
| 307 | istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2, |
96 | istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2, |
| 308 | istate->r3, istate->r4, istate->r5, istate->r6); |
97 | istate->r3, istate->r4, istate->r5, istate->r6); |
| 309 | } |
98 | } |
| 310 | 99 | ||
| 311 | /** Returns the mask of active interrupts. */ |
- | |
| 312 | static inline uint32_t gxemul_irqc_get_sources(void) |
- | |
| 313 | { |
- | |
| 314 | return *((uint32_t *) gxemul_irqc); |
- | |
| 315 | } |
- | |
| 316 | - | ||
| 317 | /** Interrupt Exception handler. |
- | |
| 318 | * |
- | |
| 319 | * Determines the sources of interrupt and calls their handlers. |
- | |
| 320 | */ |
- | |
| 321 | static void irq_exception(int exc_no, istate_t *istate) |
- | |
| 322 | { |
- | |
| 323 | uint32_t sources = gxemul_irqc_get_sources(); |
- | |
| 324 | unsigned int i; |
- | |
| 325 | - | ||
| 326 | for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
- | |
| 327 | if (sources & (1 << i)) { |
- | |
| 328 | irq_t *irq = irq_dispatch_and_lock(i); |
- | |
| 329 | if (irq) { |
- | |
| 330 | /* The IRQ handler was found. */ |
- | |
| 331 | irq->handler(irq); |
- | |
| 332 | spinlock_unlock(&irq->lock); |
- | |
| 333 | } else { |
- | |
| 334 | /* Spurious interrupt.*/ |
- | |
| 335 | printf("cpu%d: spurious interrupt (inum=%d)\n", |
- | |
| 336 | CPU->id, i); |
- | |
| 337 | } |
- | |
| 338 | } |
- | |
| 339 | } |
- | |
| 340 | } |
- | |
| 341 | - | ||
| 342 | /** Fills exception vectors with appropriate exception handlers. */ |
100 | /** Fills exception vectors with appropriate exception handlers. */ |
| 343 | void install_exception_handlers(void) |
101 | void install_exception_handlers(void) |
| 344 | { |
102 | { |
| 345 | install_handler((unsigned) reset_exception_entry, |
103 | install_handler((unsigned) reset_exception_entry, |
| 346 | (unsigned *) EXC_RESET_VEC); |
104 | (unsigned *) EXC_RESET_VEC); |
| Line 383... | Line 141... | ||
| 383 | :: [control_reg] "r" (control_reg) |
141 | :: [control_reg] "r" (control_reg) |
| 384 | ); |
142 | ); |
| 385 | } |
143 | } |
| 386 | #endif |
144 | #endif |
| 387 | 145 | ||
| - | 146 | /** Interrupt Exception handler. |
|
| - | 147 | * |
|
| - | 148 | * Determines the sources of interrupt and calls their handlers. |
|
| - | 149 | */ |
|
| - | 150 | static void irq_exception(int exc_no, istate_t *istate) |
|
| - | 151 | { |
|
| - | 152 | machine_irq_exception(exc_no, istate); |
|
| - | 153 | } |
|
| - | 154 | ||
| 388 | /** Initializes exception handling. |
155 | /** Initializes exception handling. |
| 389 | * |
156 | * |
| 390 | * Installs low-level exception handlers and then registers |
157 | * Installs low-level exception handlers and then registers |
| 391 | * exceptions and their handlers to kernel exception dispatcher. |
158 | * exceptions and their handlers to kernel exception dispatcher. |
| 392 | */ |
159 | */ |