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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup arm32 |
29 | /** @addtogroup arm32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | * @brief Memory barriers. |
33 | * @brief Memory barriers. |
34 | */ |
34 | */ |
Line 37... | Line 37... | ||
37 | #define KERN_arm32_BARRIER_H_ |
37 | #define KERN_arm32_BARRIER_H_ |
38 | 38 | ||
39 | /* |
39 | /* |
40 | * TODO: implement true ARM memory barriers for macros below. |
40 | * TODO: implement true ARM memory barriers for macros below. |
41 | */ |
41 | */ |
42 | #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") |
42 | #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") |
43 | #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") |
43 | #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") |
44 | 44 | ||
45 | #define memory_barrier() asm volatile ("" ::: "memory") |
45 | #define memory_barrier() asm volatile ("" ::: "memory") |
46 | #define read_barrier() asm volatile ("" ::: "memory") |
46 | #define read_barrier() asm volatile ("" ::: "memory") |
47 | #define write_barrier() asm volatile ("" ::: "memory") |
47 | #define write_barrier() asm volatile ("" ::: "memory") |
48 | 48 | ||
49 | #define smc_coherence(a) |
49 | #define smc_coherence(a) |
50 | #define smc_coherence_block(a, l) |
50 | #define smc_coherence_block(a, l) |
51 | 51 | ||
52 | #endif |
52 | #endif |