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#include <arch/arch.h>
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#include <arch/arch.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/hypercall.h>
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#include <arch/sun4v/hypercall.h>
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#include <arch/sun4v/arch.h>
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#include <arch/sun4v/cpu.h>
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#include <arch/mm/pagesize.h>
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#include <arch/mm/pagesize.h>
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#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/mmu.h>
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#include <arch/mm/sun4v/mmu.h>
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#include <arch/mm/sun4v/tlb.h>
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#include <arch/mm/sun4v/tlb.h>
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	 */
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	 */
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	sethi %hi(physmem_base), %l4
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	sethi %hi(physmem_base), %l4
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	stx %l6, [%l4 + %lo(physmem_base)]
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	stx %l6, [%l4 + %lo(physmem_base)]
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	/*
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	/*
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	 * Set CPUID.
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	 */
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	__HYPERCALL_FAST(CPU_MYID)
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	mov SCRATCHPAD_CPUID, %g1
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	stxa %o1, [%g1] ASI_SCRATCHPAD
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	/*
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	 * Set MMU fault status area for the current CPU.
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	 */
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	set mmu_fsas, %o0			! o0 <= addr. of fault status areas array
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	add %o0, %l6, %o0			! kernel address to real address
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	mulx %o1, MMU_FSA_SIZE, %g1		! g1 <= offset of current CPU's fault status area
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	add %g1, %o0, %o0			! o0 <= FSA of the current CPU
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	mov SCRATCHPAD_MMU_FSA, %g1
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	stxa %o0, [%g1] ASI_SCRATCHPAD		! remember MMU fault status area to speed up miss handler
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	__HYPERCALL_FAST(MMU_FAULT_AREA_CONF)
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	/*
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	 * Store a template of a TTE Data entry for kernel mappings.
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	 * This template will be used from the kernel MMU miss handler.
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	 */
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	!TTE_DATA(0, %l5, %g2, %g3, %g1)
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	setx TTE_FLAGS | PAGESIZE_8K, %g2, %g1; \
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	add %g1, %l5, %g1; \
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	set kernel_8k_tlb_data_template, %g4
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	stx %g1, [%g4]
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	/*
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	 * So far, we have not touched the stack.
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	 * So far, we have not touched the stack.
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	 * It is a good idea to set the kernel stack to a known state now.
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	 * It is a good idea to set the kernel stack to a known state now.
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	 */
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	 */
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	sethi %hi(temporary_boot_stack), %sp
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	sethi %hi(temporary_boot_stack), %sp
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	or %sp, %lo(temporary_boot_stack), %sp
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	or %sp, %lo(temporary_boot_stack), %sp
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.align 8
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.align 8
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.global physmem_base		! copy of the physical memory base address
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.global physmem_base		! copy of the physical memory base address
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physmem_base:
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physmem_base:
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	.quad 0
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	.quad 0
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.global kernel_8k_tlb_data_template
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kernel_8k_tlb_data_template:
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	.quad 0
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/* MMU fault status areas for all CPUs */
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.align MMU_FSA_ALIGNMENT
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.global mmu_fsas
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mmu_fsas:
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	!.space (MMU_FSA_SIZE * MAX_NUM_STRANDS)
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	.space 8192