WebSVN – HelenOS – Diff – /branches/sparc/kernel/arch/sparc64/src/mm/sun4v/as.c



{
#ifdef CONFIG_TSB
    int order = fnzb32(
        (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH);
 
    uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
 
    if (!tsb)
        return -1;
 
    as->arch.tsb_description.page_size = PAGESIZE_8K;
    as->arch.tsb_description.associativity = 1;
    as->arch.tsb_description.num_ttes = TSB_ENTRY_COUNT;
    as->arch.tsb_description.pgsize_mask = 1 << PAGESIZE_8K;
    as->arch.tsb_description.tsb_base = tsb;
    as->arch.tsb_description.reserved = 0;
    as->arch.tsb_description.context = 0;
 
    memsetb((void *) PA2KA(as->arch.tsb_description.tsb_base),
        TSB_ENTRY_COUNT * sizeof(tsb_entry_t), 0);
#endif
    return 0;
}
 
int as_destructor_arch(as_t *as)
{
#ifdef CONFIG_TSB
    count_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    frame_free((uintptr_t) as->arch.tsb_description.tsb_base);
    return cnt;
#else
    return 0;
#endif
}
 
int as_create_arch(as_t *as, int flags)
{
#ifdef CONFIG_TSB
    tsb_invalidate(as, 0, (count_t) -1);
 
#endif
    return 0;
}
 
/** Perform sparc64-specific tasks when an address space becomes active on the

 
#ifdef CONFIG_TSB   
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
 
    ASSERT(as->arch.tsb_description.tsb_base);
    uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
       
    if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
        /*
         * TSBs were allocated from memory not covered
         * by the locked 4M kernel DTLB entry. We need

         */
        mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);
        dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    }
 
    __hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&(as->arch.tsb_description)));
   
#endif
}
 
/** Perform sparc64-specific tasks when an address space is removed from the

#ifdef CONFIG_TSB
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
 
    ASSERT(as->arch.tsb_description.tsb_base);
 
    uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
       
    if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
        /*
         * TSBs were allocated from memory not covered
         * by the locked 4M kernel DTLB entry. We need

Rev 4130	Rev 4433
Line 64...	Line 64...
64	{	64	{
65	#ifdef CONFIG_TSB	65	#ifdef CONFIG_TSB
66	int order = fnzb32(	66	int order = fnzb32(
67	(TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH);	67	(TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH);
68		68
69	uintptr_t tsb = (uintptr_t) frame_alloc(order, flags \| FRAME_KA);	69	uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
70		70
71	if (!tsb)	71	if (!tsb)
72	return -1;	72	return -1;
73		73
74	as->arch.tsb_description.page_size = PAGESIZE_8K;	74	as->arch.tsb_description.page_size = PAGESIZE_8K;
75	as->arch.tsb_description.associativity = 1;	75	as->arch.tsb_description.associativity = 1;
76	as->arch.tsb_description.num_ttes = TSB_ENTRY_COUNT;	76	as->arch.tsb_description.num_ttes = TSB_ENTRY_COUNT;
77	as->arch.tsb_description.pgsize_mask = 1 << PAGESIZE_8K;	77	as->arch.tsb_description.pgsize_mask = 1 << PAGESIZE_8K;
78	as->arch.tsb_description.tsb_base = tsb;	78	as->arch.tsb_description.tsb_base = tsb;
79	as->arch.tsb_description.reserved = 0;	79	as->arch.tsb_description.reserved = 0;
-		80	as->arch.tsb_description.context = 0;
80		81
81	memsetb((void *) as->arch.tsb_description.tsb_base,	82	memsetb((void *) PA2KA(as->arch.tsb_description.tsb_base),
82	TSB_ENTRY_COUNT * sizeof(tsb_entry_t), 0);	83	TSB_ENTRY_COUNT * sizeof(tsb_entry_t), 0);
83	#endif	84	#endif
84	return 0;	85	return 0;
85	}	86	}
86		87
87	int as_destructor_arch(as_t *as)	88	int as_destructor_arch(as_t *as)
88	{	89	{
89	#ifdef CONFIG_TSB	90	#ifdef CONFIG_TSB
90	count_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH;	91	count_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH;
91	frame_free(KA2PA((uintptr_t) as->arch.tsb_description.tsb_base));	92	frame_free((uintptr_t) as->arch.tsb_description.tsb_base);
92	return cnt;	93	return cnt;
93	#else	94	#else
94	return 0;	95	return 0;
95	#endif	96	#endif
96	}	97	}
97		98
98	int as_create_arch(as_t *as, int flags)	99	int as_create_arch(as_t *as, int flags)
99	{	100	{
100	#ifdef CONFIG_TSB	101	#ifdef CONFIG_TSB
101	tsb_invalidate(as, 0, (count_t) -1);	102	tsb_invalidate(as, 0, (count_t) -1);
102	as->arch.tsb_description.context = as->asid;	-
103	#endif	103	#endif
104	return 0;	104	return 0;
105	}	105	}
106		106
107	/** Perform sparc64-specific tasks when an address space becomes active on the	107	/** Perform sparc64-specific tasks when an address space becomes active on the
Line 117...	Line 117...
117		117
118	#ifdef CONFIG_TSB	118	#ifdef CONFIG_TSB
119	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);	119	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
120		120
121	ASSERT(as->arch.tsb_description.tsb_base);	121	ASSERT(as->arch.tsb_description.tsb_base);
122	uintptr_t tsb = as->arch.tsb_description.tsb_base;	122	uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
123		123
124	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {	124	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
125	/*	125	/*
126	* TSBs were allocated from memory not covered	126	* TSBs were allocated from memory not covered
127	* by the locked 4M kernel DTLB entry. We need	127	* by the locked 4M kernel DTLB entry. We need
Line 129...	Line 129...
129	*/	129	*/
130	mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);	130	mmu_demap_page(tsb, 0, MMU_FLAG_DTLB);
131	dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);	131	dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
132	}	132	}
133		133
134	__hypercall_fast2(MMU_TSB_CTX0, 1, as->arch.tsb_description.tsb_base);	134	__hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&(as->arch.tsb_description)));
135		135
136	#endif	136	#endif
137	}	137	}
138		138
139	/** Perform sparc64-specific tasks when an address space is removed from the	139	/** Perform sparc64-specific tasks when an address space is removed from the
Line 154...	Line 154...
154	#ifdef CONFIG_TSB	154	#ifdef CONFIG_TSB
155	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);	155	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
156		156
157	ASSERT(as->arch.tsb_description.tsb_base);	157	ASSERT(as->arch.tsb_description.tsb_base);
158		158
159	uintptr_t tsb = as->arch.tsb_description.tsb_base;	159	uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
160		160
161	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {	161	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
162	/*	162	/*
163	* TSBs were allocated from memory not covered	163	* TSBs were allocated from memory not covered
164	* by the locked 4M kernel DTLB entry. We need	164	* by the locked 4M kernel DTLB entry. We need

Subversion Repositories HelenOS

(root)/branches/sparc/kernel/arch/sparc64/src/mm/sun4v/as.c @ 4340 – Rev 4130 → 4433