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43 | * Parameters: |
43 | * Parameters: |
44 | * \tmpreg1 global register to be used for scratching purposes |
44 | * \tmpreg1 global register to be used for scratching purposes |
45 | * \tmpreg2 global register to be used for scratching purposes |
45 | * \tmpreg2 global register to be used for scratching purposes |
46 | */ |
46 | */ |
47 | .macro SAVE_TO_USPACE_WBUF tmpreg1, tmpreg2 |
47 | .macro SAVE_TO_USPACE_WBUF tmpreg1, tmpreg2 |
48 | get_kstack_wbuf_ptr \tmpreg1, \tmpreg2 |
48 | set SCRATCHPAD_WBUF, \tmpreg2 |
49 | ldx [\tmpreg2 + 8], \tmpreg1 |
49 | ldxa [\tmpreg2] ASI_SCRATCHPAD, \tmpreg1 |
50 | stx %l0, [\tmpreg1 + L0_OFFSET] |
50 | stx %l0, [\tmpreg1 + L0_OFFSET] |
51 | stx %l1, [\tmpreg1 + L1_OFFSET] |
51 | stx %l1, [\tmpreg1 + L1_OFFSET] |
52 | stx %l2, [\tmpreg1 + L2_OFFSET] |
52 | stx %l2, [\tmpreg1 + L2_OFFSET] |
53 | stx %l3, [\tmpreg1 + L3_OFFSET] |
53 | stx %l3, [\tmpreg1 + L3_OFFSET] |
54 | stx %l4, [\tmpreg1 + L4_OFFSET] |
54 | stx %l4, [\tmpreg1 + L4_OFFSET] |
Line 62... | Line 62... | ||
62 | stx %i4, [\tmpreg1 + I4_OFFSET] |
62 | stx %i4, [\tmpreg1 + I4_OFFSET] |
63 | stx %i5, [\tmpreg1 + I5_OFFSET] |
63 | stx %i5, [\tmpreg1 + I5_OFFSET] |
64 | stx %i6, [\tmpreg1 + I6_OFFSET] |
64 | stx %i6, [\tmpreg1 + I6_OFFSET] |
65 | stx %i7, [\tmpreg1 + I7_OFFSET] |
65 | stx %i7, [\tmpreg1 + I7_OFFSET] |
66 | add \tmpreg1, STACK_WINDOW_SAVE_AREA_SIZE, \tmpreg1 |
66 | add \tmpreg1, STACK_WINDOW_SAVE_AREA_SIZE, \tmpreg1 |
67 | stx \tmpreg1, [\tmpreg2 + 8] |
67 | stxa \tmpreg1, [\tmpreg2] ASI_SCRATCHPAD |
68 | .endm |
68 | .endm |
69 | 69 | ||
70 | /* |
70 | /* |
71 | * Macro used to spill userspace window to userspace window buffer. |
71 | * Macro used to spill userspace window to userspace window buffer. |
72 | * It is triggered from normal kernel code doing SAVE when |
72 | * It is triggered from normal kernel code doing SAVE when |