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| 74 | 74 | ||
| 75 | /* |
75 | /* |
| 76 | * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel |
76 | * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel |
| 77 | * (context 0), an identity mapping (with displacement) is installed. Otherwise |
77 | * (context 0), an identity mapping (with displacement) is installed. Otherwise |
| 78 | * a higher level service routine is called. |
78 | * a higher level service routine is called. |
| 79 | * |
- | |
| 80 | * TODO implement calling the higher level service routine |
- | |
| 81 | */ |
79 | */ |
| 82 | .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl |
80 | .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl |
| 83 | 81 | ||
| 84 | mov SCRATCHPAD_MMU_FSA, %g1 |
82 | mov SCRATCHPAD_MMU_FSA, %g1 |
| 85 | ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area |
83 | ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area |
| 86 | 84 | ||
| 87 | /* service by higher-level routine when context != 0 */ |
85 | /* read faulting context */ |
| 88 | add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context |
86 | add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context |
| 89 | ldxa [%g2] ASI_REAL, %g3 ! read the fault context |
87 | ldxa [%g2] ASI_REAL, %g3 ! read the fault context |
| 90 | brnz %g3, 0f |
- | |
| 91 | nop |
- | |
| 92 | 88 | ||
| 93 | /* read the faulting address */ |
89 | /* read the faulting address */ |
| 94 | add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address |
90 | add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address |
| 95 | ldxa [%g2] ASI_REAL, %g1 ! read the fault address |
91 | ldxa [%g2] ASI_REAL, %g1 ! read the fault address |
| 96 | srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary |
92 | srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary |
| 97 | sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 |
93 | sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 |
| 98 | 94 | ||
| - | 95 | /* service by higher-level routine when context != 0 */ |
|
| - | 96 | brnz %g3, 0f |
|
| - | 97 | nop |
|
| - | 98 | ||
| 99 | /* exclude page number 0 from installing the identity mapping */ |
99 | /* exclude page number 0 from installing the identity mapping */ |
| 100 | brz %g1, 0f |
100 | brz %g1, 0f |
| 101 | nop |
101 | nop |
| 102 | 102 | ||
| - | 103 | /* |
|
| 103 | /* installing the identity does not fit into 32 instructions, call a separate routine */ |
104 | * Installing the identity does not fit into 32 instructions, call |
| - | 105 | * a separate routine. The routine performs RETRY, hence the call never |
|
| - | 106 | * returns. |
|
| - | 107 | */ |
|
| 104 | ba install_identity_mapping |
108 | ba install_identity_mapping |
| 105 | nop |
109 | nop |
| 106 | 110 | ||
| - | 111 | 0: |
|
| - | 112 | ||
| - | 113 | /* |
|
| - | 114 | * One of the scenarios in which this trap can occur is when the |
|
| - | 115 | * register window spill/fill handler accesses a memory which is not |
|
| - | 116 | * mapped. In such a case, this handler will be called from TL = 1. |
|
| - | 117 | * We handle the situation by pretending that the MMU miss occurred |
|
| - | 118 | * on TL = 0. Once the MMU miss trap is services, the instruction which |
|
| - | 119 | * caused the spill/fill trap is restarted, the spill/fill trap occurs, |
|
| - | 120 | * but this time its handler accesse memory which IS mapped. |
|
| - | 121 | */ |
|
| - | 122 | .if (\tl > 0) |
|
| - | 123 | wrpr %g0, 1, %tl |
|
| - | 124 | .endif |
|
| - | 125 | ||
| - | 126 | /* |
|
| - | 127 | * Save the faulting virtual page and faulting context to the %g2 |
|
| - | 128 | * register. The most significant 51 bits of the %g2 register will |
|
| - | 129 | * contain the virtual address which caused the fault truncated to the |
|
| - | 130 | * page boundary. The least significant 13 bits of the %g2 register |
|
| - | 131 | * will contain the number of the context in which the fault occurred. |
|
| - | 132 | * The value of the %g2 register will be passed as a parameter to the |
|
| 107 | 0: ! TODO - call higher level service routine |
133 | * higher level service routine. |
| - | 134 | */ |
|
| - | 135 | or %g1, %g3, %g2 |
|
| 108 | 136 | ||
| - | 137 | PREEMPTIBLE_HANDLER fast_data_access_mmu_miss |
|
| 109 | .endm |
138 | .endm |
| 110 | 139 | ||
| - | 140 | /* |
|
| - | 141 | * Handler of the Fast Data MMU Protection trap. Finds the trapping address |
|
| - | 142 | * and context and calls higher level service routine. |
|
| - | 143 | */ |
|
| 111 | .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl |
144 | .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl |
| - | 145 | /* |
|
| - | 146 | * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. |
|
| - | 147 | */ |
|
| - | 148 | .if (\tl > 0) |
|
| - | 149 | wrpr %g0, 1, %tl |
|
| - | 150 | .endif |
|
| - | 151 | ||
| - | 152 | mov SCRATCHPAD_MMU_FSA, %g1 |
|
| - | 153 | ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area |
|
| - | 154 | ||
| - | 155 | /* read faulting context */ |
|
| - | 156 | add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context |
|
| - | 157 | ldxa [%g2] ASI_REAL, %g3 ! read the fault context |
|
| - | 158 | ||
| - | 159 | /* read the faulting address */ |
|
| - | 160 | add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address |
|
| - | 161 | ldxa [%g2] ASI_REAL, %g1 ! read the fault address |
|
| - | 162 | srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary |
|
| - | 163 | sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 |
|
| - | 164 | ||
| - | 165 | /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */ |
|
| - | 166 | or %g1, %g3, %g2 |
|
| - | 167 | ||
| - | 168 | PREEMPTIBLE_HANDLER fast_data_access_protection |
|
| 112 | .endm |
169 | .endm |
| 113 | 170 | ||
| 114 | #endif /* __ASM__ */ |
171 | #endif /* __ASM__ */ |
| 115 | 172 | ||
| 116 | #endif |
173 | #endif |