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 */
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 */
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#ifndef KERN_sparc64_TSB_H_
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#ifndef KERN_sparc64_TSB_H_
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#define KERN_sparc64_TSB_H_
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#define KERN_sparc64_TSB_H_
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/*
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 * ITSB abd DTSB will claim 64K of memory, which
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 * is a nice number considered that it is one of
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 * the page sizes supported by hardware, which,
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 * again, is nice because TSBs need to be locked
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 * in TLBs - only one TLB entry will do.
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 */
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#define TSB_SIZE            2   /* when changing this, change
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                         * as.c as well */
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#define ITSB_ENTRY_COUNT        (512 * (1 << TSB_SIZE))
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#define DTSB_ENTRY_COUNT        (512 * (1 << TSB_SIZE))
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#define TSB_TAG_TARGET_CONTEXT_SHIFT    48
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#ifndef __ASM__
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#if defined (SUN4U)
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#include <arch/mm/sun4u/tte.h>
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#include <arch/mm/sun4u/tsb.h>
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#include <arch/mm/sun4u/mmu.h>
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#include <arch/types.h>
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/** TSB Base register. */
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typedef union tsb_base_reg {
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    uint64_t value;
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    struct {
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        uint64_t base : 51; /**< TSB base address, bits 63:13. */
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        unsigned split : 1; /**< Split vs. common TSB for 8K and 64K
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                     * pages. HelenOS uses only 8K pages
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                     * for user mappings, so we always set
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                     * this to 0.
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                     */
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        unsigned : 9;
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        unsigned size : 3;  /**< TSB size. Number of entries is
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                     * 512 * 2^size. */
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    } __attribute__ ((packed));
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} tsb_base_reg_t;
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/** Read ITSB Base register.
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 *
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 * @return Content of the ITSB Base register.
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 */
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static inline uint64_t itsb_base_read(void)
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{
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    return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE);
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}
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/** Read DTSB Base register.
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 *
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 * @return Content of the DTSB Base register.
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 */
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static inline uint64_t dtsb_base_read(void)
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{
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    return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE);
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}
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/** Write ITSB Base register.
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 *
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 * @param v New content of the ITSB Base register.
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 */
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static inline void itsb_base_write(uint64_t v)
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{
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    asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v);
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}
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/** Write DTSB Base register.
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 *
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 * @param v New content of the DTSB Base register.
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 */
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static inline void dtsb_base_write(uint64_t v)
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{
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    asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v);
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}
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#if defined (US3)
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#elif defined (SUN4V)
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/** Write DTSB Primary Extension register.
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 *
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 * @param v New content of the DTSB Primary Extension register.
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 */
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static inline void dtsb_primary_extension_write(uint64_t v)
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{
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    asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v);
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}
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/** Write DTSB Secondary Extension register.
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 *
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 * @param v New content of the DTSB Secondary Extension register.
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 */
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static inline void dtsb_secondary_extension_write(uint64_t v)
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{
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    asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v);
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}
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/** Write DTSB Nucleus Extension register.
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 *
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 * @param v New content of the DTSB Nucleus Extension register.
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 */
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static inline void dtsb_nucleus_extension_write(uint64_t v)
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{
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    asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v);
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}
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/** Write ITSB Primary Extension register.
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#include <arch/mm/sun4v/tsb.h>
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 *
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 * @param v New content of the ITSB Primary Extension register.
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 */
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static inline void itsb_primary_extension_write(uint64_t v)
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{
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    asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v);
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}
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/** Write ITSB Nucleus Extension register.
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 *
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 * @param v New content of the ITSB Nucleus Extension register.
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 */
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static inline void itsb_nucleus_extension_write(uint64_t v)
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{
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    asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v);
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}
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#endif
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#endif
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/* Forward declarations. */
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struct as;
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struct pte;
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extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages);
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extern void itsb_pte_copy(struct pte *t, index_t index);
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extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro);
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#endif /* !def __ASM__ */
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */