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34 | */ |
34 | */ |
35 | 35 | ||
36 | #ifndef KERN_sparc64_sun4v_MMU_H_ |
36 | #ifndef KERN_sparc64_sun4v_MMU_H_ |
37 | #define KERN_sparc64_sun4v_MMU_H_ |
37 | #define KERN_sparc64_sun4v_MMU_H_ |
38 | 38 | ||
39 | #define ASI_REAL 0x14 |
39 | #define ASI_REAL 0x14 /**< MMU bypass ASI */ |
40 | 40 | ||
41 | #define VA_PRIMARY_CONTEXT_REG 0x8 /**< DMMU primary context registeri VA. */ |
41 | #define VA_PRIMARY_CONTEXT_REG 0x8 /**< primary context register VA. */ |
42 | #define ASI_PRIMARY_CONTEXT_REG 0x21 /**< DMMU primary context register ASI. */ |
42 | #define ASI_PRIMARY_CONTEXT_REG 0x21 /**< primary context register ASI. */ |
- | 43 | ||
- | 44 | #define VA_SECONDARY_CONTEXT_REG 0x10 /**< secondary context register VA. */ |
|
- | 45 | #define ASI_SECONDARY_CONTEXT_REG 0x21 /**< secondary context register ASI. */ |
|
43 | 46 | ||
44 | #endif |
47 | #endif |
45 | 48 | ||
46 | /** @} |
49 | /** @} |
47 | */ |
50 | */ |