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Line 45... | Line 45... | ||
45 | #include <print.h> |
45 | #include <print.h> |
46 | #include <debug.h> |
46 | #include <debug.h> |
47 | #include <align.h> |
47 | #include <align.h> |
48 | #include <interrupt.h> |
48 | #include <interrupt.h> |
49 | 49 | ||
50 | static void tlb_refill_fail(istate_t *istate); |
50 | static void tlb_refill_fail(istate_t *); |
51 | static void tlb_invalid_fail(istate_t *istate); |
51 | static void tlb_invalid_fail(istate_t *); |
52 | static void tlb_modified_fail(istate_t *istate); |
52 | static void tlb_modified_fail(istate_t *); |
53 | 53 | ||
54 | static pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc); |
54 | static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *, int *); |
55 | 55 | ||
56 | /** Initialize TLB |
56 | /** Initialize TLB. |
57 | * |
57 | * |
58 | * Initialize TLB. |
- | |
59 | * Invalidate all entries and mark wired entries. |
58 | * Invalidate all entries and mark wired entries. |
60 | */ |
59 | */ |
61 | void tlb_arch_init(void) |
60 | void tlb_arch_init(void) |
62 | { |
61 | { |
63 | int i; |
62 | int i; |
Line 79... | Line 78... | ||
79 | * entries (e.g. mapping kernel stacks in kseg3). |
78 | * entries (e.g. mapping kernel stacks in kseg3). |
80 | */ |
79 | */ |
81 | cp0_wired_write(TLB_WIRED); |
80 | cp0_wired_write(TLB_WIRED); |
82 | } |
81 | } |
83 | 82 | ||
84 | /** Process TLB Refill Exception |
83 | /** Process TLB Refill Exception. |
85 | * |
84 | * |
86 | * Process TLB Refill Exception. |
- | |
87 | * |
- | |
88 | * @param istate Interrupted register context. |
85 | * @param istate Interrupted register context. |
89 | */ |
86 | */ |
90 | void tlb_refill(istate_t *istate) |
87 | void tlb_refill(istate_t *istate) |
91 | { |
88 | { |
92 | entry_lo_t lo; |
89 | entry_lo_t lo; |
93 | entry_hi_t hi; |
90 | entry_hi_t hi; |
Line 126... | Line 123... | ||
126 | * Record access to PTE. |
123 | * Record access to PTE. |
127 | */ |
124 | */ |
128 | pte->a = 1; |
125 | pte->a = 1; |
129 | 126 | ||
130 | tlb_prepare_entry_hi(&hi, asid, badvaddr); |
127 | tlb_prepare_entry_hi(&hi, asid, badvaddr); |
131 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn); |
128 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, |
- | 129 | pte->pfn); |
|
132 | 130 | ||
133 | /* |
131 | /* |
134 | * New entry is to be inserted into TLB |
132 | * New entry is to be inserted into TLB |
135 | */ |
133 | */ |
136 | cp0_entry_hi_write(hi.value); |
134 | cp0_entry_hi_write(hi.value); |
137 | if ((badvaddr/PAGE_SIZE) % 2 == 0) { |
135 | if ((badvaddr / PAGE_SIZE) % 2 == 0) { |
138 | cp0_entry_lo0_write(lo.value); |
136 | cp0_entry_lo0_write(lo.value); |
139 | cp0_entry_lo1_write(0); |
137 | cp0_entry_lo1_write(0); |
140 | } |
138 | } |
141 | else { |
139 | else { |
142 | cp0_entry_lo0_write(0); |
140 | cp0_entry_lo0_write(0); |
Line 151... | Line 149... | ||
151 | fail: |
149 | fail: |
152 | page_table_unlock(AS, true); |
150 | page_table_unlock(AS, true); |
153 | tlb_refill_fail(istate); |
151 | tlb_refill_fail(istate); |
154 | } |
152 | } |
155 | 153 | ||
156 | /** Process TLB Invalid Exception |
154 | /** Process TLB Invalid Exception. |
157 | * |
- | |
158 | * Process TLB Invalid Exception. |
- | |
159 | * |
155 | * |
160 | * @param istate Interrupted register context. |
156 | * @param istate Interrupted register context. |
161 | */ |
157 | */ |
162 | void tlb_invalid(istate_t *istate) |
158 | void tlb_invalid(istate_t *istate) |
163 | { |
159 | { |
164 | tlb_index_t index; |
160 | tlb_index_t index; |
165 | uintptr_t badvaddr; |
161 | uintptr_t badvaddr; |
Line 215... | Line 211... | ||
215 | /* |
211 | /* |
216 | * Record access to PTE. |
212 | * Record access to PTE. |
217 | */ |
213 | */ |
218 | pte->a = 1; |
214 | pte->a = 1; |
219 | 215 | ||
220 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, pte->pfn); |
216 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable, |
- | 217 | pte->pfn); |
|
221 | 218 | ||
222 | /* |
219 | /* |
223 | * The entry is to be updated in TLB. |
220 | * The entry is to be updated in TLB. |
224 | */ |
221 | */ |
225 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
222 | if ((badvaddr / PAGE_SIZE) % 2 == 0) |
226 | cp0_entry_lo0_write(lo.value); |
223 | cp0_entry_lo0_write(lo.value); |
227 | else |
224 | else |
228 | cp0_entry_lo1_write(lo.value); |
225 | cp0_entry_lo1_write(lo.value); |
229 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
226 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
230 | tlbwi(); |
227 | tlbwi(); |
Line 235... | Line 232... | ||
235 | fail: |
232 | fail: |
236 | page_table_unlock(AS, true); |
233 | page_table_unlock(AS, true); |
237 | tlb_invalid_fail(istate); |
234 | tlb_invalid_fail(istate); |
238 | } |
235 | } |
239 | 236 | ||
240 | /** Process TLB Modified Exception |
237 | /** Process TLB Modified Exception. |
241 | * |
- | |
242 | * Process TLB Modified Exception. |
- | |
243 | * |
238 | * |
244 | * @param istate Interrupted register context. |
239 | * @param istate Interrupted register context. |
245 | */ |
240 | */ |
246 | void tlb_modified(istate_t *istate) |
241 | void tlb_modified(istate_t *istate) |
247 | { |
242 | { |
248 | tlb_index_t index; |
243 | tlb_index_t index; |
249 | uintptr_t badvaddr; |
244 | uintptr_t badvaddr; |
Line 290... | Line 285... | ||
290 | panic("unexpected pfrc (%d)\n", pfrc); |
285 | panic("unexpected pfrc (%d)\n", pfrc); |
291 | } |
286 | } |
292 | } |
287 | } |
293 | 288 | ||
294 | /* |
289 | /* |
295 | * Fail if the page is not writable. |
- | |
296 | */ |
- | |
297 | if (!pte->w) |
- | |
298 | goto fail; |
- | |
299 | - | ||
300 | /* |
- | |
301 | * Read the faulting TLB entry. |
290 | * Read the faulting TLB entry. |
302 | */ |
291 | */ |
303 | tlbr(); |
292 | tlbr(); |
304 | 293 | ||
305 | /* |
294 | /* |
306 | * Record access and write to PTE. |
295 | * Record access and write to PTE. |
307 | */ |
296 | */ |
308 | pte->a = 1; |
297 | pte->a = 1; |
309 | pte->d = 1; |
298 | pte->d = 1; |
310 | 299 | ||
311 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable, pte->pfn); |
300 | tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable, |
- | 301 | pte->pfn); |
|
312 | 302 | ||
313 | /* |
303 | /* |
314 | * The entry is to be updated in TLB. |
304 | * The entry is to be updated in TLB. |
315 | */ |
305 | */ |
316 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
306 | if ((badvaddr / PAGE_SIZE) % 2 == 0) |
317 | cp0_entry_lo0_write(lo.value); |
307 | cp0_entry_lo0_write(lo.value); |
318 | else |
308 | else |
319 | cp0_entry_lo1_write(lo.value); |
309 | cp0_entry_lo1_write(lo.value); |
320 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
310 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
321 | tlbwi(); |
311 | tlbwi(); |
Line 338... | Line 328... | ||
338 | symbol = s; |
328 | symbol = s; |
339 | s = get_symtab_entry(istate->ra); |
329 | s = get_symtab_entry(istate->ra); |
340 | if (s) |
330 | if (s) |
341 | sym2 = s; |
331 | sym2 = s; |
342 | 332 | ||
343 | fault_if_from_uspace(istate, "TLB Refill Exception on %p", cp0_badvaddr_read()); |
333 | fault_if_from_uspace(istate, "TLB Refill Exception on %p", |
- | 334 | cp0_badvaddr_read()); |
|
344 | panic("%x: TLB Refill Exception at %x(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2); |
335 | panic("%x: TLB Refill Exception at %x(%s<-%s)\n", cp0_badvaddr_read(), |
- | 336 | istate->epc, symbol, sym2); |
|
345 | } |
337 | } |
346 | 338 | ||
347 | 339 | ||
348 | void tlb_invalid_fail(istate_t *istate) |
340 | void tlb_invalid_fail(istate_t *istate) |
349 | { |
341 | { |
350 | char *symbol = ""; |
342 | char *symbol = ""; |
351 | 343 | ||
352 | char *s = get_symtab_entry(istate->epc); |
344 | char *s = get_symtab_entry(istate->epc); |
353 | if (s) |
345 | if (s) |
354 | symbol = s; |
346 | symbol = s; |
355 | fault_if_from_uspace(istate, "TLB Invalid Exception on %p", cp0_badvaddr_read()); |
347 | fault_if_from_uspace(istate, "TLB Invalid Exception on %p", |
- | 348 | cp0_badvaddr_read()); |
|
356 | panic("%x: TLB Invalid Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); |
349 | panic("%x: TLB Invalid Exception at %x(%s)\n", cp0_badvaddr_read(), |
- | 350 | istate->epc, symbol); |
|
357 | } |
351 | } |
358 | 352 | ||
359 | void tlb_modified_fail(istate_t *istate) |
353 | void tlb_modified_fail(istate_t *istate) |
360 | { |
354 | { |
361 | char *symbol = ""; |
355 | char *symbol = ""; |
362 | 356 | ||
363 | char *s = get_symtab_entry(istate->epc); |
357 | char *s = get_symtab_entry(istate->epc); |
364 | if (s) |
358 | if (s) |
365 | symbol = s; |
359 | symbol = s; |
366 | fault_if_from_uspace(istate, "TLB Modified Exception on %p", cp0_badvaddr_read()); |
360 | fault_if_from_uspace(istate, "TLB Modified Exception on %p", |
- | 361 | cp0_badvaddr_read()); |
|
367 | panic("%x: TLB Modified Exception at %x(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); |
362 | panic("%x: TLB Modified Exception at %x(%s)\n", cp0_badvaddr_read(), |
- | 363 | istate->epc, symbol); |
|
368 | } |
364 | } |
369 | 365 | ||
370 | /** Try to find PTE for faulting address |
366 | /** Try to find PTE for faulting address. |
371 | * |
367 | * |
372 | * Try to find PTE for faulting address. |
- | |
373 | * The AS->lock must be held on entry to this function. |
368 | * The AS->lock must be held on entry to this function. |
374 | * |
369 | * |
375 | * @param badvaddr Faulting virtual address. |
370 | * @param badvaddr Faulting virtual address. |
376 | * @param access Access mode that caused the fault. |
371 | * @param access Access mode that caused the fault. |
377 | * @param istate Pointer to interrupted state. |
372 | * @param istate Pointer to interrupted state. |
378 | * @param pfrc Pointer to variable where as_page_fault() return code will be stored. |
373 | * @param pfrc Pointer to variable where as_page_fault() return code |
- | 374 | * will be stored. |
|
379 | * |
375 | * |
380 | * @return PTE on success, NULL otherwise. |
376 | * @return PTE on success, NULL otherwise. |
381 | */ |
377 | */ |
- | 378 | pte_t * |
|
382 | pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc) |
379 | find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, |
- | 380 | int *pfrc) |
|
383 | { |
381 | { |
384 | entry_hi_t hi; |
382 | entry_hi_t hi; |
385 | pte_t *pte; |
383 | pte_t *pte; |
386 | 384 | ||
387 | hi.value = cp0_entry_hi_read(); |
385 | hi.value = cp0_entry_hi_read(); |
Line 396... | Line 394... | ||
396 | 394 | ||
397 | /* |
395 | /* |
398 | * Check if the mapping exists in page tables. |
396 | * Check if the mapping exists in page tables. |
399 | */ |
397 | */ |
400 | pte = page_mapping_find(AS, badvaddr); |
398 | pte = page_mapping_find(AS, badvaddr); |
401 | if (pte && pte->p) { |
399 | if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) { |
402 | /* |
400 | /* |
403 | * Mapping found in page tables. |
401 | * Mapping found in page tables. |
404 | * Immediately succeed. |
402 | * Immediately succeed. |
405 | */ |
403 | */ |
406 | return pte; |
404 | return pte; |
Line 419... | Line 417... | ||
419 | * The mapping ought to be in place. |
417 | * The mapping ought to be in place. |
420 | */ |
418 | */ |
421 | page_table_lock(AS, true); |
419 | page_table_lock(AS, true); |
422 | pte = page_mapping_find(AS, badvaddr); |
420 | pte = page_mapping_find(AS, badvaddr); |
423 | ASSERT(pte && pte->p); |
421 | ASSERT(pte && pte->p); |
- | 422 | ASSERT(pte->w || access != PF_ACCESS_WRITE); |
|
424 | return pte; |
423 | return pte; |
425 | break; |
424 | break; |
426 | case AS_PF_DEFER: |
425 | case AS_PF_DEFER: |
427 | page_table_lock(AS, true); |
426 | page_table_lock(AS, true); |
428 | *pfrc = AS_PF_DEFER; |
427 | *pfrc = AS_PF_DEFER; |
Line 439... | Line 438... | ||
439 | } |
438 | } |
440 | 439 | ||
441 | } |
440 | } |
442 | } |
441 | } |
443 | 442 | ||
- | 443 | void |
|
444 | void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn) |
444 | tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, |
- | 445 | uintptr_t pfn) |
|
445 | { |
446 | { |
446 | lo->value = 0; |
447 | lo->value = 0; |
447 | lo->g = g; |
448 | lo->g = g; |
448 | lo->v = v; |
449 | lo->v = v; |
449 | lo->d = d; |
450 | lo->d = d; |
Line 478... | Line 479... | ||
478 | hi.value = cp0_entry_hi_read(); |
479 | hi.value = cp0_entry_hi_read(); |
479 | lo0.value = cp0_entry_lo0_read(); |
480 | lo0.value = cp0_entry_lo0_read(); |
480 | lo1.value = cp0_entry_lo1_read(); |
481 | lo1.value = cp0_entry_lo1_read(); |
481 | 482 | ||
482 | printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n", |
483 | printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n", |
483 | i, hi.asid, hi.vpn2, mask.mask, |
484 | i, hi.asid, hi.vpn2, mask.mask, |
484 | lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn); |
485 | lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn); |
485 | printf(" %1u %1u %1u %1u %#6x\n", |
486 | printf(" %1u %1u %1u %1u %#6x\n", |
486 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
487 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
487 | } |
488 | } |
488 | 489 | ||
489 | cp0_entry_hi_write(hi_save.value); |
490 | cp0_entry_hi_write(hi_save.value); |
490 | } |
491 | } |
491 | 492 | ||
Line 558... | Line 559... | ||
558 | 559 | ||
559 | interrupts_restore(ipl); |
560 | interrupts_restore(ipl); |
560 | cp0_entry_hi_write(hi_save.value); |
561 | cp0_entry_hi_write(hi_save.value); |
561 | } |
562 | } |
562 | 563 | ||
563 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
564 | /** Invalidate TLB entries for specified page range belonging to specified |
- | 565 | * address space. |
|
564 | * |
566 | * |
565 | * @param asid Address space identifier. |
567 | * @param asid Address space identifier. |
566 | * @param page First page whose TLB entry is to be invalidated. |
568 | * @param page First page whose TLB entry is to be invalidated. |
567 | * @param cnt Number of entries to invalidate. |
569 | * @param cnt Number of entries to invalidate. |
568 | */ |
570 | */ |
569 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
571 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
570 | { |
572 | { |
571 | unsigned int i; |
573 | unsigned int i; |
572 | ipl_t ipl; |
574 | ipl_t ipl; |
Line 586... | Line 588... | ||
586 | 588 | ||
587 | tlbp(); |
589 | tlbp(); |
588 | index.value = cp0_index_read(); |
590 | index.value = cp0_index_read(); |
589 | 591 | ||
590 | if (!index.p) { |
592 | if (!index.p) { |
- | 593 | /* |
|
591 | /* Entry was found, index register contains valid index. */ |
594 | * Entry was found, index register contains valid |
- | 595 | * index. |
|
- | 596 | */ |
|
592 | tlbr(); |
597 | tlbr(); |
593 | 598 | ||
594 | lo0.value = cp0_entry_lo0_read(); |
599 | lo0.value = cp0_entry_lo0_read(); |
595 | lo1.value = cp0_entry_lo1_read(); |
600 | lo1.value = cp0_entry_lo1_read(); |
596 | 601 |