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Rev 2292 | Rev 2307 | ||
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Line 72... | Line 72... | ||
72 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
72 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
73 | if (status & INTR_DISPATCH_STATUS_BUSY) |
73 | if (status & INTR_DISPATCH_STATUS_BUSY) |
74 | panic("Interrupt Dispatch Status busy bit set\n"); |
74 | panic("Interrupt Dispatch Status busy bit set\n"); |
75 | 75 | ||
76 | do { |
76 | do { |
77 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) |
77 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0, |
78 | func); |
78 | (uintptr_t) func); |
79 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
79 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
80 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
80 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
81 | asi_u64_write(ASI_UDB_INTR_W, |
81 | asi_u64_write(ASI_UDB_INTR_W, |
82 | (mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
82 | (mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
83 | ASI_UDB_INTR_W_DISPATCH, 0); |
83 | ASI_UDB_INTR_W_DISPATCH, 0); |