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| Rev 2131 | Rev 2292 | ||
|---|---|---|---|
| Line 52... | Line 52... | ||
| 52 | * |
52 | * |
| 53 | */ |
53 | */ |
| 54 | void as_install_arch(as_t *as) |
54 | void as_install_arch(as_t *as) |
| 55 | { |
55 | { |
| 56 | asid_t asid; |
56 | asid_t asid; |
| 57 | ipl_t ipl; |
- | |
| 58 | uint32_t sr; |
57 | uint32_t sr; |
| 59 | 58 | ||
| 60 | ipl = interrupts_disable(); |
- | |
| 61 | spinlock_lock(&as->lock); |
- | |
| 62 | - | ||
| 63 | asid = as->asid; |
59 | asid = as->asid; |
| 64 | 60 | ||
| 65 | /* Lower 2 GB, user and supervisor access */ |
61 | /* Lower 2 GB, user and supervisor access */ |
| 66 | for (sr = 0; sr < 8; sr++) { |
62 | for (sr = 0; sr < 8; sr++) { |
| 67 | asm volatile ( |
63 | asm volatile ( |
| Line 77... | Line 73... | ||
| 77 | "mtsrin %0, %1\n" |
73 | "mtsrin %0, %1\n" |
| 78 | : |
74 | : |
| 79 | : "r" ((0x4000 << 16) + (asid << 4) + sr), "r" (sr << 28) |
75 | : "r" ((0x4000 << 16) + (asid << 4) + sr), "r" (sr << 28) |
| 80 | ); |
76 | ); |
| 81 | } |
77 | } |
| 82 | - | ||
| 83 | spinlock_unlock(&as->lock); |
- | |
| 84 | interrupts_restore(ipl); |
- | |
| 85 | } |
78 | } |
| 86 | 79 | ||
| 87 | /** @} |
80 | /** @} |
| 88 | */ |
81 | */ |