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31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** @file |
33 | /** @file |
34 | */ |
34 | */ |
35 | 35 | ||
- | 36 | #include <arch.h> |
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36 | #include <arch/pm.h> |
37 | #include <arch/pm.h> |
37 | #include <arch/asm.h> |
38 | #include <arch/asm.h> |
38 | #include <mm/as.h> |
39 | #include <mm/as.h> |
39 | #include <mm/frame.h> |
40 | #include <mm/frame.h> |
40 | #include <memstr.h> |
41 | #include <memstr.h> |
Line 225... | Line 226... | ||
225 | * to its own TSS. We just need to load the TR register. |
226 | * to its own TSS. We just need to load the TR register. |
226 | */ |
227 | */ |
227 | tr_load(gdtselector(TSS_DES)); |
228 | tr_load(gdtselector(TSS_DES)); |
228 | } |
229 | } |
229 | 230 | ||
- | 231 | /* Reboot the machine by initiating |
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- | 232 | * a triple fault |
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- | 233 | */ |
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- | 234 | void arch_reboot(void) |
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- | 235 | { |
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- | 236 | preemption_disable(); |
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- | 237 | ipl_t ipl = interrupts_disable(); |
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- | 238 | ||
- | 239 | memsetb((uintptr_t) idt, sizeof(idt), 0); |
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- | 240 | idtr_load(&idtr); |
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- | 241 | ||
- | 242 | interrupts_restore(ipl); |
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- | 243 | asm volatile ( |
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- | 244 | "int $0x03\n" |
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- | 245 | "cli\n" |
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- | 246 | "hlt\n" |
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- | 247 | ); |
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- | 248 | } |
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- | 249 | ||
230 | /** @} |
250 | /** @} |
231 | */ |
251 | */ |