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Rev 4307 | Rev 4327 | ||
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Line 203... | Line 203... | ||
203 | dp_init(dep); |
203 | dp_init(dep); |
204 | return EOK; |
204 | return EOK; |
205 | } |
205 | } |
206 | 206 | ||
207 | /*===========================================================================* |
207 | /*===========================================================================* |
- | 208 | * dp8390_dump * |
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- | 209 | *===========================================================================*/ |
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- | 210 | void dp8390_dump( dpeth_t * dep ) |
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- | 211 | { |
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- | 212 | // dpeth_t *dep; |
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- | 213 | int /*i,*/ isr; |
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- | 214 | ||
- | 215 | // printf("\n"); |
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- | 216 | // for (i= 0, dep = &de_table[0]; i<DE_PORT_NR; i++, dep++) |
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- | 217 | // { |
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- | 218 | #if XXX |
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- | 219 | if (dep->de_mode == DEM_DISABLED) |
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- | 220 | printf("dp8390 port %d is disabled\n", i); |
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- | 221 | else if (dep->de_mode == DEM_SINK) |
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- | 222 | printf("dp8390 port %d is in sink mode\n", i); |
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- | 223 | #endif |
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- | 224 | ||
- | 225 | if (dep->de_mode != DEM_ENABLED) |
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- | 226 | // continue; |
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- | 227 | return; |
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- | 228 | ||
- | 229 | // printf("dp8390 statistics of port %d:\n", i); |
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- | 230 | ||
- | 231 | printf("recvErr :%8ld\t", dep->de_stat.ets_recvErr); |
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- | 232 | printf("sendErr :%8ld\t", dep->de_stat.ets_sendErr); |
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- | 233 | printf("OVW :%8ld\n", dep->de_stat.ets_OVW); |
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- | 234 | ||
- | 235 | printf("CRCerr :%8ld\t", dep->de_stat.ets_CRCerr); |
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- | 236 | printf("frameAll :%8ld\t", dep->de_stat.ets_frameAll); |
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- | 237 | printf("missedP :%8ld\n", dep->de_stat.ets_missedP); |
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- | 238 | ||
- | 239 | printf("packetR :%8ld\t", dep->de_stat.ets_packetR); |
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- | 240 | printf("packetT :%8ld\t", dep->de_stat.ets_packetT); |
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- | 241 | printf("transDef :%8ld\n", dep->de_stat.ets_transDef); |
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- | 242 | ||
- | 243 | printf("collision :%8ld\t", dep->de_stat.ets_collision); |
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- | 244 | printf("transAb :%8ld\t", dep->de_stat.ets_transAb); |
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- | 245 | printf("carrSense :%8ld\n", dep->de_stat.ets_carrSense); |
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- | 246 | ||
- | 247 | printf("fifoUnder :%8ld\t", dep->de_stat.ets_fifoUnder); |
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- | 248 | printf("fifoOver :%8ld\t", dep->de_stat.ets_fifoOver); |
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- | 249 | printf("CDheartbeat:%8ld\n", dep->de_stat.ets_CDheartbeat); |
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- | 250 | ||
- | 251 | printf("OWC :%8ld\t", dep->de_stat.ets_OWC); |
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- | 252 | ||
- | 253 | isr= inb_reg0(dep, DP_ISR); |
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- | 254 | printf("dp_isr = 0x%x + 0x%x, de_flags = 0x%x\n", isr, |
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- | 255 | inb_reg0(dep, DP_ISR), dep->de_flags); |
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- | 256 | // } |
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- | 257 | } |
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- | 258 | ||
- | 259 | /*===========================================================================* |
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208 | * do_init * |
260 | * do_init * |
209 | *===========================================================================*/ |
261 | *===========================================================================*/ |
210 | int do_init( dpeth_t * dep, int mode ){ |
262 | int do_init( dpeth_t * dep, int mode ){ |
211 | if (dep->de_mode == DEM_DISABLED) |
263 | if (dep->de_mode == DEM_DISABLED) |
212 | { |
264 | { |
Line 586... | Line 638... | ||
586 | } |
638 | } |
587 | 639 | ||
588 | /*===========================================================================* |
640 | /*===========================================================================* |
589 | * dp_check_ints * |
641 | * dp_check_ints * |
590 | *===========================================================================*/ |
642 | *===========================================================================*/ |
591 | void dp_check_ints(dep) |
643 | void dp_check_ints(dep, isr) |
592 | dpeth_t *dep; |
644 | dpeth_t *dep; |
- | 645 | int isr; |
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593 | { |
646 | { |
594 | int isr, tsr; |
647 | int /*isr,*/ tsr; |
595 | int size, sendq_tail; |
648 | int size, sendq_tail; |
596 | 649 | ||
597 | if (!(dep->de_flags & DEF_ENABLED)) |
650 | if (!(dep->de_flags & DEF_ENABLED)) |
598 | panic("", "dp8390: got premature interrupt", NO_NUM); |
651 | panic("", "dp8390: got premature interrupt", NO_NUM); |
599 | 652 | ||
600 | for(;;) |
653 | for(;;) |
601 | { |
654 | { |
602 | isr = inb_reg0(dep, DP_ISR); |
655 | // isr = inb_reg0(dep, DP_ISR); |
603 | if (!isr) |
656 | if (!isr) |
604 | break; |
657 | break; |
605 | outb_reg0(dep, DP_ISR, isr); |
658 | outb_reg0(dep, DP_ISR, isr); |
606 | if (isr & (ISR_PTX|ISR_TXE)) |
659 | if (isr & (ISR_PTX|ISR_TXE)) |
607 | { |
660 | { |
Line 718... | Line 771... | ||
718 | "%s: NIC stopped\n", dep->de_name); } |
771 | "%s: NIC stopped\n", dep->de_name); } |
719 | #endif |
772 | #endif |
720 | dep->de_flags |= DEF_STOPPED; |
773 | dep->de_flags |= DEF_STOPPED; |
721 | break; |
774 | break; |
722 | } |
775 | } |
- | 776 | isr = inb_reg0(dep, DP_ISR); |
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723 | } |
777 | } |
724 | if ((dep->de_flags & (DEF_READING|DEF_STOPPED)) == |
778 | if ((dep->de_flags & (DEF_READING|DEF_STOPPED)) == |
725 | (DEF_READING|DEF_STOPPED)) |
779 | (DEF_READING|DEF_STOPPED)) |
726 | { |
780 | { |
727 | /* The chip is stopped, and all arrived packets are |
781 | /* The chip is stopped, and all arrived packets are |
Line 1502... | Line 1556... | ||
1502 | } |
1556 | } |
1503 | 1557 | ||
1504 | if (r < 0) |
1558 | if (r < 0) |
1505 | panic("", "dp8390: send failed:", r); |
1559 | panic("", "dp8390: send failed:", r); |
1506 | |
1560 | |
1507 | dep->de_read_s = 0; |
1561 | */ dep->de_read_s = 0; |
1508 | */ dep->de_flags &= ~(DEF_PACK_SEND | DEF_PACK_RECV); |
1562 | dep->de_flags &= ~(DEF_PACK_SEND | DEF_PACK_RECV); |
1509 | } |
1563 | } |
1510 | 1564 | ||
1511 | /*===========================================================================* |
1565 | /*===========================================================================* |
1512 | * get_userdata * |
1566 | * get_userdata * |
1513 | *===========================================================================*/ |
1567 | *===========================================================================*/ |