Rev 3386 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3386 | Rev 4153 | ||
---|---|---|---|
Line 36... | Line 36... | ||
36 | #define KERN_sparc64_CACHE_SPEC_H_ |
36 | #define KERN_sparc64_CACHE_SPEC_H_ |
37 | 37 | ||
38 | /* |
38 | /* |
39 | * The following macros are valid for the following processors: |
39 | * The following macros are valid for the following processors: |
40 | * |
40 | * |
- | 41 | * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, |
|
41 | * UltraSPARC, UltraSPARC II, UltraSPARC IIi |
42 | * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ |
42 | * |
43 | * |
43 | * Should we support other UltraSPARC processors, we need to make sure that |
44 | * Should we support other UltraSPARC processors, we need to make sure that |
44 | * the macros are defined correctly for them. |
45 | * the macros are defined correctly for them. |
45 | */ |
46 | */ |
46 | 47 | ||
- | 48 | #if defined (US) |
|
47 | #define DCACHE_SIZE (16 * 1024) |
49 | #define DCACHE_SIZE (16 * 1024) |
- | 50 | #elif defined (US3) |
|
- | 51 | #define DCACHE_SIZE (64 * 1024) |
|
- | 52 | #endif |
|
48 | #define DCACHE_LINE_SIZE 32 |
53 | #define DCACHE_LINE_SIZE 32 |
49 | 54 | ||
50 | #define ICACHE_SIZE (16 * 1024) |
- | |
51 | #define ICACHE_WAYS 2 |
- | |
52 | #define ICACHE_LINE_SIZE 32 |
- | |
53 | - | ||
54 | #endif |
55 | #endif |
55 | 56 | ||
56 | /** @} |
57 | /** @} |
57 | */ |
58 | */ |