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Rev 3386 Rev 4153
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup ia32   
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/** @addtogroup ia32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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    d->offset_16_31 = offset >> 16;
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    d->offset_16_31 = offset >> 16;
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}
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}
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void tss_initialize(tss_t *t)
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void tss_initialize(tss_t *t)
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{
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{
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    memsetb(t, sizeof(struct tss), 0);
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    memsetb(t, sizeof(tss_t), 0);
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}
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}
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/*
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/*
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 * This function takes care of proper setup of IDT and IDTR.
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 * This function takes care of proper setup of IDT and IDTR.
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 */
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 */
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    for (i = 0; i < IDT_ITEMS; i++) {
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    for (i = 0; i < IDT_ITEMS; i++) {
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        d = &idt[i];
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        d = &idt[i];
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        d->unused = 0;
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        d->unused = 0;
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        d->selector = selector(KTEXT_DES);
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        d->selector = gdtselector(KTEXT_DES);
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        d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
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        d->access = AR_PRESENT | AR_INTERRUPT;  /* masking interrupt */
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        if (i == VECTOR_SYSCALL) {
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        if (i == VECTOR_SYSCALL) {
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            /*
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            /*
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        "pushfl\n"
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        "pushfl\n"
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        "pop %%eax\n"
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        "pop %%eax\n"
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        "and $0xffff8fff, %%eax\n"
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        "and $0xffff8fff, %%eax\n"
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        "push %%eax\n"
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        "push %%eax\n"
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        "popfl\n"
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        "popfl\n"
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        : : : "eax"
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        ::: "eax"
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    );
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    );
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}
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}
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/* Clean AM(18) flag in CR0 register */
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/* Clean AM(18) flag in CR0 register */
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static void clean_AM_flag(void)
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static void clean_AM_flag(void)
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{
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{
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    asm volatile (
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    asm volatile (
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        "mov %%cr0, %%eax\n"
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        "mov %%cr0, %%eax\n"
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        "and $0xfffbffff, %%eax\n"
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        "and $0xfffbffff, %%eax\n"
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        "mov %%eax, %%cr0\n"
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        "mov %%eax, %%cr0\n"
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        : : : "eax"
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        ::: "eax"
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    );
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    );
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}
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}
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void pm_init(void)
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void pm_init(void)
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{
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{
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        tss_p = &tss;
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        tss_p = &tss;
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    }
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    }
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    else {
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    else {
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        tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
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        tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
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        if (!tss_p)
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        if (!tss_p)
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            panic("could not allocate TSS\n");
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            panic("Cannot allocate TSS.");
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    }
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    }
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    tss_initialize(tss_p);
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    tss_initialize(tss_p);
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    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
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    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
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    /*
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    /*
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     * As of this moment, the current CPU has its own GDT pointing
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     * As of this moment, the current CPU has its own GDT pointing
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     * to its own TSS. We just need to load the TR register.
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     * to its own TSS. We just need to load the TR register.
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     */
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     */
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    tr_load(selector(TSS_DES));
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    tr_load(gdtselector(TSS_DES));
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    clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
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    clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
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    clean_AM_flag();          /* Disable alignment check */
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    clean_AM_flag();          /* Disable alignment check */
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}
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}
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