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Rev 3386 Rev 4153
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup ia32   
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/** @addtogroup ia32
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 * @{
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 * @{
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 */
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 */
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/**
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/**
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 * @file
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 * @file
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 * @brief   i8254 chip driver.
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 * @brief i8254 chip driver.
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 *
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 *
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 * Low level time functions.
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 * Low level time functions.
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 */
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 */
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch.h>
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#include <arch.h>
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#include <time/delay.h>
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#include <time/delay.h>
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#include <ddi/irq.h>
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#include <ddi/irq.h>
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#include <ddi/device.h>
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#include <ddi/device.h>
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#define CLK_PORT1   0x40
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#define CLK_PORT1   ((ioport8_t *)0x40)
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#define CLK_PORT4   0x43
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#define CLK_PORT4   ((ioport8_t *)0x43)
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#define CLK_CONST   1193180
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#define CLK_CONST   1193180
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#define MAGIC_NUMBER    1194
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#define MAGIC_NUMBER    1194
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static irq_t i8254_irq;
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static irq_t i8254_irq;
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static irq_ownership_t i8254_claim(void)
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static irq_ownership_t i8254_claim(irq_t *irq)
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{
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{
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    return IRQ_ACCEPT;
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    return IRQ_ACCEPT;
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}
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}
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static void i8254_irq_handler(irq_t *irq, void *arg __attribute__((unused)), ...)
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static void i8254_irq_handler(irq_t *irq)
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{
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{
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    /*
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    /*
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     * This IRQ is responsible for kernel preemption.
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     * This IRQ is responsible for kernel preemption.
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     * Nevertheless, we are now holding a spinlock which prevents
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     * Nevertheless, we are now holding a spinlock which prevents
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     * preemption. For this particular IRQ, we don't need the
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     * preemption. For this particular IRQ, we don't need the
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    i8254_normal_operation();
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    i8254_normal_operation();
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}
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}
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void i8254_normal_operation(void)
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void i8254_normal_operation(void)
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{
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{
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    outb(CLK_PORT4, 0x36);
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    pio_write_8(CLK_PORT4, 0x36);
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    pic_disable_irqs(1 << IRQ_CLK);
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    pic_disable_irqs(1 << IRQ_CLK);
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    outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
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    pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
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    outb(CLK_PORT1, (CLK_CONST / HZ) >> 8);
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    pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8);
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    pic_enable_irqs(1 << IRQ_CLK);
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    pic_enable_irqs(1 << IRQ_CLK);
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}
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}
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#define LOOPS 150000
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#define LOOPS 150000
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#define SHIFT 11
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#define SHIFT 11
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    /*
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    /*
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     * One-shot timer. Count-down from 0xffff at 1193180Hz
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     * One-shot timer. Count-down from 0xffff at 1193180Hz
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     * MAGIC_NUMBER is the magic value for 1ms.
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     * MAGIC_NUMBER is the magic value for 1ms.
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     */
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     */
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    outb(CLK_PORT4, 0x30);
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    pio_write_8(CLK_PORT4, 0x30);
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    outb(CLK_PORT1, 0xff);
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    pio_write_8(CLK_PORT1, 0xff);
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    outb(CLK_PORT1, 0xff);
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    pio_write_8(CLK_PORT1, 0xff);
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    do {
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    do {
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        /* will read both status and count */
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        /* will read both status and count */
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        outb(CLK_PORT4, 0xc2);
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        pio_write_8(CLK_PORT4, 0xc2);
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        not_ok = (uint8_t) ((inb(CLK_PORT1) >> 6) & 1);
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        not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1);
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        t1 = inb(CLK_PORT1);
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        t1 = pio_read_8(CLK_PORT1);
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        t1 |= inb(CLK_PORT1) << 8;
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        t1 |= pio_read_8(CLK_PORT1) << 8;
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    } while (not_ok);
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    } while (not_ok);
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    asm_delay_loop(LOOPS);
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    asm_delay_loop(LOOPS);
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    outb(CLK_PORT4, 0xd2);
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    pio_write_8(CLK_PORT4, 0xd2);
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    t2 = inb(CLK_PORT1);
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    t2 = pio_read_8(CLK_PORT1);
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    t2 |= inb(CLK_PORT1) << 8;
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    t2 |= pio_read_8(CLK_PORT1) << 8;
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    /*
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    /*
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     * We want to determine the overhead of the calibrating mechanism.
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     * We want to determine the overhead of the calibrating mechanism.
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     */
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     */
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    outb(CLK_PORT4, 0xd2);
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    pio_write_8(CLK_PORT4, 0xd2);
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    o1 = inb(CLK_PORT1);
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    o1 = pio_read_8(CLK_PORT1);
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    o1 |= inb(CLK_PORT1) << 8;
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    o1 |= pio_read_8(CLK_PORT1) << 8;
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    asm_fake_loop(LOOPS);
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    asm_fake_loop(LOOPS);
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    outb(CLK_PORT4, 0xd2);
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    pio_write_8(CLK_PORT4, 0xd2);
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    o2 = inb(CLK_PORT1);
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    o2 = pio_read_8(CLK_PORT1);
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    o2 |= inb(CLK_PORT1) << 8;
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    o2 |= pio_read_8(CLK_PORT1) << 8;
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    CPU->delay_loop_const =
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    CPU->delay_loop_const =
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        ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
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        ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
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        (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
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        (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
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