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{
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{
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    asm volatile (
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    asm volatile (
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        "dcbst 0, %0\n"
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        "dcbst 0, %0\n"
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        "sync\n"
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        "sync\n"
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        "icbi 0, %0\n"
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        "icbi 0, %0\n"
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        "sync\n"
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        "isync\n"
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        "isync\n"
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        :: "r" (addr)
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        :: "r" (addr)
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    );
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    );
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}
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}
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    for (i = 0; i < len; i += COHERENCE_INVAL_MIN) {
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    for (i = 0; i < len; i += COHERENCE_INVAL_MIN) {
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        asm volatile ("icbi 0, %0\n" :: "r" (addr + i));
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        asm volatile ("icbi 0, %0\n" :: "r" (addr + i));
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    }
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    }
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    asm volatile ("isync");
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    asm volatile (
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        "sync\n"
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        "isync\n"
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    );
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}
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}
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#endif
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#endif
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/** @}
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/** @}