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Line 48... | Line 48... | ||
48 | #include <sysinfo/sysinfo.h> |
48 | #include <sysinfo/sysinfo.h> |
49 | 49 | ||
50 | #include <arch/interrupt.h> |
50 | #include <arch/interrupt.h> |
51 | #include <arch/drivers/arc.h> |
51 | #include <arch/drivers/arc.h> |
52 | #include <console/chardev.h> |
52 | #include <console/chardev.h> |
- | 53 | #include <arch/barrier.h> |
|
53 | #include <arch/debugger.h> |
54 | #include <arch/debugger.h> |
54 | #include <genarch/fb/fb.h> |
55 | #include <genarch/fb/fb.h> |
55 | #include <genarch/fb/visuals.h> |
56 | #include <genarch/fb/visuals.h> |
56 | #include <macros.h> |
57 | #include <macros.h> |
57 | #include <ddi/device.h> |
58 | #include <ddi/device.h> |
Line 98... | Line 99... | ||
98 | exception_init(); |
99 | exception_init(); |
99 | arc_init(); |
100 | arc_init(); |
100 | 101 | ||
101 | /* Copy the exception vectors to the right places */ |
102 | /* Copy the exception vectors to the right places */ |
102 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
103 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
- | 104 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE); |
|
103 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
105 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
- | 106 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE); |
|
104 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
107 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
- | 108 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE); |
|
105 | 109 | ||
106 | /* |
110 | /* |
107 | * Switch to BEV normal level so that exception vectors point to the kernel. |
111 | * Switch to BEV normal level so that exception vectors point to the |
108 | * Clear the error level. |
112 | * kernel. Clear the error level. |
109 | */ |
113 | */ |
- | 114 | cp0_status_write(cp0_status_read() & |
|
110 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
115 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
111 | 116 | ||
112 | /* |
117 | /* |
113 | * Mask all interrupts |
118 | * Mask all interrupts |
114 | */ |
119 | */ |
115 | cp0_mask_all_int(); |
120 | cp0_mask_all_int(); |
Line 120... | Line 125... | ||
120 | void arch_post_mm_init(void) |
125 | void arch_post_mm_init(void) |
121 | { |
126 | { |
122 | interrupt_init(); |
127 | interrupt_init(); |
123 | console_init(device_assign_devno()); |
128 | console_init(device_assign_devno()); |
124 | #ifdef CONFIG_FB |
129 | #ifdef CONFIG_FB |
- | 130 | /* GXemul framebuffer */ |
|
125 | fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer |
131 | fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
126 | #endif |
132 | #endif |
127 | sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); |
133 | sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); |
128 | } |
134 | } |
129 | 135 | ||
130 | void arch_post_cpu_init(void) |
136 | void arch_post_cpu_init(void) |
Line 141... | Line 147... | ||
141 | 147 | ||
142 | void userspace(uspace_arg_t *kernel_uarg) |
148 | void userspace(uspace_arg_t *kernel_uarg) |
143 | { |
149 | { |
144 | /* EXL = 1, UM = 1, IE = 1 */ |
150 | /* EXL = 1, UM = 1, IE = 1 */ |
145 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
151 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
146 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
152 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
147 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
153 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
148 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
154 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
149 | (uintptr_t) kernel_uarg->uspace_uarg, |
155 | (uintptr_t) kernel_uarg->uspace_uarg, |
150 | (uintptr_t) kernel_uarg->uspace_entry); |
156 | (uintptr_t) kernel_uarg->uspace_entry); |
151 | 157 | ||
152 | while (1); |
158 | while (1) |
- | 159 | ; |
|
153 | } |
160 | } |
154 | 161 | ||
155 | /** Perform mips32 specific tasks needed before the new task is run. */ |
162 | /** Perform mips32 specific tasks needed before the new task is run. */ |
156 | void before_task_runs_arch(void) |
163 | void before_task_runs_arch(void) |
157 | { |
164 | { |
158 | } |
165 | } |
159 | 166 | ||
160 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
167 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
161 | void before_thread_runs_arch(void) |
168 | void before_thread_runs_arch(void) |
162 | { |
169 | { |
163 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; |
170 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - |
- | 171 | SP_DELTA]; |
|
164 | } |
172 | } |
165 | 173 | ||
166 | void after_thread_ran_arch(void) |
174 | void after_thread_ran_arch(void) |
167 | { |
175 | { |
168 | } |
176 | } |
Line 180... | Line 188... | ||
180 | void arch_reboot(void) |
188 | void arch_reboot(void) |
181 | { |
189 | { |
182 | if (!arc_reboot()) |
190 | if (!arc_reboot()) |
183 | ___halt(); |
191 | ___halt(); |
184 | 192 | ||
185 | while (1); |
193 | while (1) |
- | 194 | ; |
|
186 | } |
195 | } |
187 | 196 | ||
188 | /** @} |
197 | /** @} |
189 | */ |
198 | */ |