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Line 42... | Line 42... | ||
42 | static fpu_context_function fpu_save, fpu_restore; |
42 | static fpu_context_function fpu_save, fpu_restore; |
43 | 43 | ||
44 | static void fpu_context_f_save(fpu_context_t *fctx) |
44 | static void fpu_context_f_save(fpu_context_t *fctx) |
45 | { |
45 | { |
46 | asm volatile ( |
46 | asm volatile ( |
47 | "fnsave %0" |
47 | "fnsave %[fctx]" |
48 | : "=m"(*fctx) |
48 | : [fctx] "=m" (*fctx) |
49 | ); |
49 | ); |
50 | } |
50 | } |
51 | 51 | ||
52 | static void fpu_context_f_restore(fpu_context_t *fctx) |
52 | static void fpu_context_f_restore(fpu_context_t *fctx) |
53 | { |
53 | { |
54 | asm volatile ( |
54 | asm volatile ( |
55 | "frstor %0" |
55 | "frstor %[fctx]" |
56 | : "=m"(*fctx) |
56 | : [fctx] "=m" (*fctx) |
57 | ); |
57 | ); |
58 | } |
58 | } |
59 | 59 | ||
60 | static void fpu_context_fx_save(fpu_context_t *fctx) |
60 | static void fpu_context_fx_save(fpu_context_t *fctx) |
61 | { |
61 | { |
62 | asm volatile ( |
62 | asm volatile ( |
63 | "fxsave %0" |
63 | "fxsave %[fctx]" |
64 | : "=m"(*fctx) |
64 | : [fctx] "=m" (*fctx) |
65 | ); |
65 | ); |
66 | } |
66 | } |
67 | 67 | ||
68 | static void fpu_context_fx_restore(fpu_context_t *fctx) |
68 | static void fpu_context_fx_restore(fpu_context_t *fctx) |
69 | { |
69 | { |
70 | asm volatile ( |
70 | asm volatile ( |
71 | "fxrstor %0" |
71 | "fxrstor %[fctx]" |
72 | : "=m"(*fctx) |
72 | : [fctx] "=m" (*fctx) |
73 | ); |
73 | ); |
74 | } |
74 | } |
75 | 75 | ||
76 | /* |
- | |
77 | Setup using fxsr instruction |
76 | /* Setup using fxsr instruction */ |
78 | */ |
- | |
79 | void fpu_fxsr(void) |
77 | void fpu_fxsr(void) |
80 | { |
78 | { |
81 | fpu_save=fpu_context_fx_save; |
79 | fpu_save=fpu_context_fx_save; |
82 | fpu_restore=fpu_context_fx_restore; |
80 | fpu_restore=fpu_context_fx_restore; |
83 | } |
81 | } |
84 | /* |
82 | |
85 | Setup using not fxsr instruction |
83 | /* Setup using not fxsr instruction */ |
86 | */ |
- | |
87 | void fpu_fsr(void) |
84 | void fpu_fsr(void) |
88 | { |
85 | { |
89 | fpu_save = fpu_context_f_save; |
86 | fpu_save = fpu_context_f_save; |
90 | fpu_restore = fpu_context_f_restore; |
87 | fpu_restore = fpu_context_f_restore; |
91 | } |
88 | } |
Line 100... | Line 97... | ||
100 | fpu_restore(fctx); |
97 | fpu_restore(fctx); |
101 | } |
98 | } |
102 | 99 | ||
103 | void fpu_init() |
100 | void fpu_init() |
104 | { |
101 | { |
- | 102 | uint32_t help0 = 0; |
|
105 | uint32_t help0 = 0, help1 = 0; |
103 | uint32_t help1 = 0; |
- | 104 | ||
106 | asm volatile ( |
105 | asm volatile ( |
107 | "fninit;\n" |
106 | "fninit\n" |
108 | "stmxcsr %0\n" |
107 | "stmxcsr %[help0]\n" |
109 | "mov %0,%1;\n" |
108 | "mov %[help0], %[help1]\n" |
110 | "or %2,%1;\n" |
109 | "or %[magic], %[help1]\n" |
111 | "mov %1,%0;\n" |
110 | "mov %[help1], %[help0]\n" |
112 | "ldmxcsr %0;\n" |
111 | "ldmxcsr %[help0]\n" |
113 | : "+m" (help0), "+r" (help1) |
112 | : [help0] "+m" (help0), [help1] "+r" (help1) |
114 | : "i" (0x1f80) |
113 | : [magic] "i" (0x1f80) |
115 | ); |
114 | ); |
116 | } |
115 | } |
117 | 116 | ||
118 | /** @} |
117 | /** @} |
119 | */ |
118 | */ |