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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32  
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/** @addtogroup arm32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief Memory barriers.
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 *  @brief Memory barriers.
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 */
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 */
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#define KERN_arm32_BARRIER_H_
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#define KERN_arm32_BARRIER_H_
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/*
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/*
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 * TODO: implement true ARM memory barriers for macros below.
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 * TODO: implement true ARM memory barriers for macros below.
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 */
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 */
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#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
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#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
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#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
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#define CS_LEAVE_BARRIER()  asm volatile ("" ::: "memory")
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#define memory_barrier()        asm volatile ("" ::: "memory")
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#define memory_barrier()  asm volatile ("" ::: "memory")
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#define read_barrier()          asm volatile ("" ::: "memory")
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#define read_barrier()    asm volatile ("" ::: "memory")
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#define write_barrier()         asm volatile ("" ::: "memory")
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#define write_barrier()   asm volatile ("" ::: "memory")
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#define smc_coherence(a)
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#define smc_coherence(a)
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#define smc_coherence_block(a, l)
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#define smc_coherence_block(a, l)
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#endif
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#endif