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Rev 3022 | Rev 4055 | ||
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44 | #include <arch/barrier.h> |
44 | #include <arch/barrier.h> |
45 | #include <preemption.h> |
45 | #include <preemption.h> |
46 | #include <time/delay.h> |
46 | #include <time/delay.h> |
47 | #include <panic.h> |
47 | #include <panic.h> |
48 | 48 | ||
- | 49 | /** Set the contents of the outgoing interrupt vector data. |
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- | 50 | * |
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- | 51 | * The first data item (data 0) will be set to the value of func, the |
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- | 52 | * rest of the vector will contain zeros. |
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- | 53 | * |
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- | 54 | * This is a helper function used from within the cross_call function. |
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- | 55 | * |
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- | 56 | * @param func value the first data item of the vector will be set to |
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- | 57 | */ |
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- | 58 | static inline void set_intr_w_data(void (* func)(void)) |
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- | 59 | { |
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- | 60 | #if defined (US) |
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- | 61 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) func); |
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- | 62 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
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- | 63 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
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- | 64 | #elif defined (US3) |
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- | 65 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_0, (uintptr_t) func); |
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- | 66 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_1, 0); |
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- | 67 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_2, 0); |
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- | 68 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_3, 0); |
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- | 69 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_4, 0); |
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- | 70 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_5, 0); |
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- | 71 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_6, 0); |
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- | 72 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_7, 0); |
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- | 73 | #endif |
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- | 74 | } |
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- | 75 | ||
49 | /** Invoke function on another processor. |
76 | /** Invoke function on another processor. |
50 | * |
77 | * |
51 | * Currently, only functions without arguments are supported. |
78 | * Currently, only functions without arguments are supported. |
52 | * Supporting more arguments in the future should be no big deal. |
79 | * Supporting more arguments in the future should be no big deal. |
53 | * |
80 | * |
Line 69... | Line 96... | ||
69 | 96 | ||
70 | preemption_disable(); |
97 | preemption_disable(); |
71 | 98 | ||
72 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
99 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
73 | if (status & INTR_DISPATCH_STATUS_BUSY) |
100 | if (status & INTR_DISPATCH_STATUS_BUSY) |
74 | panic("Interrupt Dispatch Status busy bit set\n"); |
101 | panic("Interrupt Dispatch Status busy bit set."); |
- | 102 | ||
- | 103 | ASSERT(!(pstate_read() & PSTATE_IE_BIT)); |
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75 | 104 | ||
76 | do { |
105 | do { |
77 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_0, |
- | |
78 | (uintptr_t) func); |
106 | set_intr_w_data(func); |
79 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
- | |
80 | asi_u64_write(ASI_UDB_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
- | |
81 | asi_u64_write(ASI_UDB_INTR_W, |
107 | asi_u64_write(ASI_INTR_W, |
82 | (mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
108 | (mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
83 | ASI_UDB_INTR_W_DISPATCH, 0); |
109 | VA_INTR_W_DISPATCH, 0); |
84 | 110 | ||
85 | membar(); |
111 | membar(); |
86 | 112 | ||
87 | do { |
113 | do { |
88 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
114 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
Line 123... | Line 149... | ||
123 | switch (ipi) { |
149 | switch (ipi) { |
124 | case IPI_TLB_SHOOTDOWN: |
150 | case IPI_TLB_SHOOTDOWN: |
125 | func = tlb_shootdown_ipi_recv; |
151 | func = tlb_shootdown_ipi_recv; |
126 | break; |
152 | break; |
127 | default: |
153 | default: |
128 | panic("Unknown IPI (%d).\n", ipi); |
154 | panic("Unknown IPI (%d).", ipi); |
129 | break; |
155 | break; |
130 | } |
156 | } |
131 | 157 | ||
132 | /* |
158 | /* |
133 | * As long as we don't support hot-plugging |
159 | * As long as we don't support hot-plugging |