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#ifndef KERN_ia64_ASM_H_
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#ifndef KERN_ia64_ASM_H_
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#define KERN_ia64_ASM_H_
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#define KERN_ia64_ASM_H_
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#include <config.h>
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#include <config.h>
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#include <typedefs.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch/register.h>
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#include <arch/register.h>
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#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
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#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
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static inline void  outb(uint64_t port,uint8_t v)
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static inline void pio_write_8(ioport8_t *port, uint8_t v)
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{
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{
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    uintptr_t prt = (uintptr_t) port;
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    *((uint8_t *)(IA64_IOSPACE_ADDRESS +
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    *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
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        ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
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    asm volatile ("mf\n" ::: "memory");
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    asm volatile ("mf\n" ::: "memory");
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}
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}
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static inline void pio_write_16(ioport16_t *port, uint16_t v)
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{
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    uintptr_t prt = (uintptr_t) port;
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    *((uint16_t *)(IA64_IOSPACE_ADDRESS +
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        ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
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    asm volatile ("mf\n" ::: "memory");
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}
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static inline void pio_write_32(ioport32_t *port, uint32_t v)
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{
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    uintptr_t prt = (uintptr_t) port;
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    *((uint32_t *)(IA64_IOSPACE_ADDRESS +
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        ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
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    asm volatile ("mf\n" ::: "memory");
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}
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static inline uint8_t pio_read_8(ioport8_t *port)
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{
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    uintptr_t prt = (uintptr_t) port;
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    asm volatile ("mf\n" ::: "memory");
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    return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
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        ((prt & 0xfff) | ((prt >> 2) << 12))));
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}
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static inline uint8_t inb(uint64_t port)
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static inline uint16_t pio_read_16(ioport16_t *port)
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{
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{
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    uintptr_t prt = (uintptr_t) port;
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    asm volatile ("mf\n" ::: "memory");
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    asm volatile ("mf\n" ::: "memory");
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    return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
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    return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
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        ((prt & 0xfff) | ((prt >> 2) << 12))));
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}
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}
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static inline uint32_t pio_read_32(ioport32_t *port)
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{
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    uintptr_t prt = (uintptr_t) port;
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    asm volatile ("mf\n" ::: "memory");
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    return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
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        ((prt & 0xfff) | ((prt >> 2) << 12))));
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}
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/** Return base address of current stack
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/** Return base address of current stack
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 *
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 *
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 * Return the base address of the current stack.
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 * Return the base address of the current stack.
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 * The stack is assumed to be STACK_SIZE long.
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 * The stack is assumed to be STACK_SIZE long.
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 */
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 */
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static inline uintptr_t get_stack_base(void)
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static inline uintptr_t get_stack_base(void)
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{
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{
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    uint64_t v;
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    uint64_t v;
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    //I'm not sure why but this code bad inlines in scheduler,
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    //so THE shifts about 16B and causes kernel panic
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    asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    //asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    //return v;
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    //this code have the same meaning but inlines well
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    asm volatile ("mov %0 = r12" : "=r" (v)  );
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    return v;
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    return v & (~(STACK_SIZE-1));
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}
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}
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/** Return Processor State Register.
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/** Return Processor State Register.
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 *
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 *
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 * @return PSR.
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 * @return PSR.
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    asm volatile ("mov %0 = cr.ivr\n" : "=r" (v));
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    asm volatile ("mov %0 = cr.ivr\n" : "=r" (v));
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    return v;
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    return v;
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}
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}
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static inline uint64_t cr64_read(void)
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{
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    uint64_t v;
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    asm volatile ("mov %0 = cr64\n" : "=r" (v));
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    return v;
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}
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/** Write ITC (Interval Timer Counter) register.
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/** Write ITC (Interval Timer Counter) register.
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 *
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 *
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 * @param v New counter value.
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 * @param v New counter value.
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 */
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 */
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static inline void itc_write(uint64_t v)
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static inline void itc_write(uint64_t v)
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extern void cpu_halt(void);
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extern void cpu_halt(void);
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extern void cpu_sleep(void);
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extern void cpu_sleep(void);
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extern void asm_delay_loop(uint32_t t);
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extern void asm_delay_loop(uint32_t t);
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extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
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extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
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    uint64_t, uint64_t);
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */