Rev 3022 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 3022 | Rev 4055 | ||
|---|---|---|---|
| Line 24... | Line 24... | ||
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup ia32 |
29 | /** @addtogroup ia32 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | */ |
33 | */ |
| 34 | 34 | ||
| Line 110... | Line 110... | ||
| 110 | d->offset_16_31 = offset >> 16; |
110 | d->offset_16_31 = offset >> 16; |
| 111 | } |
111 | } |
| 112 | 112 | ||
| 113 | void tss_initialize(tss_t *t) |
113 | void tss_initialize(tss_t *t) |
| 114 | { |
114 | { |
| 115 | memsetb((uintptr_t) t, sizeof(struct tss), 0); |
115 | memsetb(t, sizeof(struct tss), 0); |
| 116 | } |
116 | } |
| 117 | 117 | ||
| 118 | /* |
118 | /* |
| 119 | * This function takes care of proper setup of IDT and IDTR. |
119 | * This function takes care of proper setup of IDT and IDTR. |
| 120 | */ |
120 | */ |
| Line 152... | Line 152... | ||
| 152 | "pushfl\n" |
152 | "pushfl\n" |
| 153 | "pop %%eax\n" |
153 | "pop %%eax\n" |
| 154 | "and $0xffff8fff, %%eax\n" |
154 | "and $0xffff8fff, %%eax\n" |
| 155 | "push %%eax\n" |
155 | "push %%eax\n" |
| 156 | "popfl\n" |
156 | "popfl\n" |
| 157 | : : : "eax" |
157 | ::: "eax" |
| 158 | ); |
158 | ); |
| 159 | } |
159 | } |
| 160 | 160 | ||
| 161 | /* Clean AM(18) flag in CR0 register */ |
161 | /* Clean AM(18) flag in CR0 register */ |
| 162 | static void clean_AM_flag(void) |
162 | static void clean_AM_flag(void) |
| 163 | { |
163 | { |
| 164 | asm volatile ( |
164 | asm volatile ( |
| 165 | "mov %%cr0, %%eax\n" |
165 | "mov %%cr0, %%eax\n" |
| 166 | "and $0xfffbffff, %%eax\n" |
166 | "and $0xfffbffff, %%eax\n" |
| 167 | "mov %%eax, %%cr0\n" |
167 | "mov %%eax, %%cr0\n" |
| 168 | : : : "eax" |
168 | ::: "eax" |
| 169 | ); |
169 | ); |
| 170 | } |
170 | } |
| 171 | 171 | ||
| 172 | void pm_init(void) |
172 | void pm_init(void) |
| 173 | { |
173 | { |
| Line 196... | Line 196... | ||
| 196 | tss_p = &tss; |
196 | tss_p = &tss; |
| 197 | } |
197 | } |
| 198 | else { |
198 | else { |
| 199 | tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC); |
199 | tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC); |
| 200 | if (!tss_p) |
200 | if (!tss_p) |
| 201 | panic("could not allocate TSS\n"); |
201 | panic("Cannot allocate TSS."); |
| 202 | } |
202 | } |
| 203 | 203 | ||
| 204 | tss_initialize(tss_p); |
204 | tss_initialize(tss_p); |
| 205 | 205 | ||
| 206 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
206 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
| Line 238... | Line 238... | ||
| 238 | void arch_reboot(void) |
238 | void arch_reboot(void) |
| 239 | { |
239 | { |
| 240 | preemption_disable(); |
240 | preemption_disable(); |
| 241 | ipl_t ipl = interrupts_disable(); |
241 | ipl_t ipl = interrupts_disable(); |
| 242 | 242 | ||
| 243 | memsetb((uintptr_t) idt, sizeof(idt), 0); |
243 | memsetb(idt, sizeof(idt), 0); |
| 244 | 244 | ||
| 245 | ptr_16_32_t idtr; |
245 | ptr_16_32_t idtr; |
| 246 | idtr.limit = sizeof(idt); |
246 | idtr.limit = sizeof(idt); |
| 247 | idtr.base = (uintptr_t) idt; |
247 | idtr.base = (uintptr_t) idt; |
| 248 | idtr_load(&idtr); |
248 | idtr_load(&idtr); |