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| 37 | #include <arch/mm/asid.h> |
37 | #include <arch/mm/asid.h> |
| 38 | #include <arch/asm.h> |
38 | #include <arch/asm.h> |
| 39 | #include <arch/types.h> |
39 | #include <arch/types.h> |
| 40 | #include <arch/mm/page.h> |
40 | #include <arch/mm/page.h> |
| 41 | 41 | ||
| 42 | /** Invalidate all entries in TLB. */ |
42 | /** Invalidate all entries in TLB. |
| - | 43 | * |
|
| - | 44 | * @note See ARM Architecture reference section 3.7.7 for details. |
|
| - | 45 | */ |
|
| 43 | void tlb_invalidate_all(void) |
46 | void tlb_invalidate_all(void) |
| 44 | { |
47 | { |
| 45 | asm volatile ( |
48 | asm volatile ( |
| 46 | "eor r1, r1\n" |
49 | "eor r1, r1\n" |
| 47 | "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528 |
50 | "mcr p15, 0, r1, c8, c7, 0\n" |
| 48 | - | ||
| 49 | ::: "r1" |
51 | ::: "r1" |
| 50 | ); |
52 | ); |
| 51 | } |
53 | } |
| 52 | 54 | ||
| 53 | 55 | ||
| 54 | /** Invalidate all entries in TLB that belong to specified address space. |
56 | /** Invalidate all entries in TLB that belong to specified address space. |
| 55 | * |
57 | * |
| 56 | * @param asid This parameter is ignored as the ARM architecture doesn't support it. |
58 | * @param asid Ignored as the ARM architecture doesn't support ASIDs. |
| 57 | */ |
59 | */ |
| 58 | void tlb_invalidate_asid(asid_t asid) |
60 | void tlb_invalidate_asid(asid_t asid) |
| 59 | { |
61 | { |
| 60 | tlb_invalidate_all(); |
62 | tlb_invalidate_all(); |
| 61 | } |
63 | } |
| Line 66... | Line 68... | ||
| 66 | * @param page Virtual adress of the page |
68 | * @param page Virtual adress of the page |
| 67 | */ |
69 | */ |
| 68 | static inline void invalidate_page(uintptr_t page) |
70 | static inline void invalidate_page(uintptr_t page) |
| 69 | { |
71 | { |
| 70 | asm volatile ( |
72 | asm volatile ( |
| 71 | "MCR p15, 0, %0, c8, c7, 1" |
73 | "mcr p15, 0, %0, c8, c7, 1" |
| 72 | 74 | ||
| 73 | : /* no output */ |
75 | : |
| 74 | : "r"(page) /* input */ |
76 | : "r"(page) |
| 75 | ); |
77 | ); |
| 76 | } |
78 | } |
| 77 | 79 | ||
| 78 | 80 | ||
| 79 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
81 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
| 80 | * |
82 | * |
| 81 | * @param asid This parameter is ignored as the ARM architecture doesn't support it. |
83 | * @param asid Ignored as the ARM architecture doesn't support it. |
| 82 | * @param page Address of the first page whose entry is to be invalidated. |
84 | * @param page Address of the first page whose entry is to be invalidated. |
| 83 | * @param cnt Number of entries to invalidate. |
85 | * @param cnt Number of entries to invalidate. |
| 84 | */ |
86 | */ |
| 85 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
87 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
| 86 | { |
88 | { |