Rev 2163 | Rev 2238 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 2163 | Rev 2199 | ||
|---|---|---|---|
| Line 43... | Line 43... | ||
| 43 | { |
43 | { |
| 44 | 44 | ||
| 45 | asm volatile ( |
45 | asm volatile ( |
| 46 | "eor r1, r1\n" |
46 | "eor r1, r1\n" |
| 47 | "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528 |
47 | "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528 |
| - | 48 | ||
| 48 | ::: "r1" |
49 | ::: "r1" |
| 49 | ); |
50 | ); |
| 50 | } |
51 | } |
| 51 | 52 | ||
| 52 | /** Invalidate all entries in TLB that belong to specified address space. |
53 | /** Invalidate all entries in TLB that belong to specified address space. |
| Line 62... | Line 63... | ||
| 62 | * @param page Virtual adress of the page |
63 | * @param page Virtual adress of the page |
| 63 | */ |
64 | */ |
| 64 | static inline void invlpg(uintptr_t page) |
65 | static inline void invlpg(uintptr_t page) |
| 65 | { |
66 | { |
| 66 | asm volatile ( |
67 | asm volatile ( |
| 67 | "MCR p15, 0, %0, c8, c7, 1" |
68 | "MCR p15, 0, %0, c8, c7, 1" |
| - | 69 | ||
| 68 | : /* no output */ |
70 | : /* no output */ |
| 69 | : "r"(page) /* input */ |
71 | : "r"(page) /* input */ |
| 70 | ); |
72 | ); |
| 71 | } |
73 | } |
| 72 | 74 | ||
| 73 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
75 | /** Invalidate TLB entries for specified page range belonging to specified address space. |
| 74 | * |
76 | * |
| 75 | * @param asid This parameter is ignored as the ARM architecture doesn't support it. |
77 | * @param asid This parameter is ignored as the ARM architecture doesn't support it. |