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Line 57... Line 57...
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extern uintptr_t exc_stack;
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extern uintptr_t exc_stack;
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inline static void setup_stack_and_save_regs()
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inline static void setup_stack_and_save_regs()
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{
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{
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/*
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str r0, =exc_stack
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str r1, =exc_stack + 4
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mrs r0, cpsr
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mrs r1, spsr
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and r0, r0, #0x1f
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and r1, r1, #0x1f
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cmp r0, r1
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be 3f
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@different exception mode => preserve sp
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ldr r1, [=exc_stack + 4]
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ldr r0, [=exc_stack]
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3:
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mrs r0, spsr
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stmfd sp!, {r0, sp, lr}
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*/
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asm volatile(   "ldr r13, =exc_stack        \n\
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asm volatile("ldr r13, =exc_stack       \n\
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    stmfd r13!, {r0}            \n\
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    stmfd r13!, {r0}            \n\
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    mrs r0, spsr                \n\
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    mrs r0, spsr                \n\
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    and r0, r0, #0x1f           \n\
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    and r0, r0, #0x1f           \n\
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    cmp r0, #0x10               \n\
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    cmp r0, #0x10               \n\
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    bne 1f                  \n\
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    bne 1f                  \n\
Line 247... Line 266...
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/** Low-level Interrupt Exception handler. */
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/** Low-level Interrupt Exception handler. */
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static void irq_exception_entry()
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static void irq_exception_entry()
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{
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{
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    asm("sub lr, lr, #4");
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    asm("sub lr, lr, #4");
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    setup_stack_and_save_regs();
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    /* switch to Undefined mode */
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    asm("stmfd sp!, {r0-r3}");
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    asm("mov r1, sp");
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    asm("mov r2, lr");
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//  asm("mrs r3, spsr");
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    asm("mrs r0, cpsr");
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    asm("bic r0, r0, #0x1f");
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    asm("orr r0, r0, #0x1b");
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    asm("msr cpsr_c, r0");
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    asm("mov sp, r1");
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    asm("mov lr, r2");
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//  asm("msr spsr, r3");
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    asm("ldmfd sp!, {r0-r3}");
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    PROCESS_EXCEPTION(EXC_IRQ);
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    CALL_EXC_DISPATCH(EXC_IRQ)
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    load_regs();
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}
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}
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/** Software Interrupt handler.
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/** Software Interrupt handler.
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 *
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 *